42   assert(Phi.isPHI() && "Expecting a Phi.");  in getPhiRegs()
91         if (MI->isPHI()) {  in expand()
138     if (CI->isPHI())  in generatePipelinedLoop()
223           if (BBI->isPHI())  in generateProlog()
297         if (BBI.isPHI())  in generateEpilog()
457         while (InstOp1 && InstOp1->isPHI() && InstOp1->getParent() == BB) {  in generateExistingPhis()
478         if (InstOp1->isPHI() && InstOp1->getParent() == KernelBB)  in generateExistingPhis()
482       bool LoopDefIsPhi = PhiInst && PhiInst->isPHI();  in generateExistingPhis()
651           if (InstOp2->isPHI() && InstOp2->getParent() == NewBB)  in generatePhis()
745       if (!MI->isSafeToMove(nullptr, SawStore) && !MI->isPHI()) {  in removeDeadInstructions()
811       if (I->isPHI() && I->getParent() == KernelBB) {  in splitLifetimes()
817         if (!MI || MI->getParent() != KernelBB || MI->isPHI())  in splitLifetimes()
850     if (!MI.isPHI())  in removePhis()
947   if (BaseDef && BaseDef->isPHI()) {  in computeDelta()
1070   while (Def->isPHI()) {  in findDefInLoop()
1096     else if (!LoopInst->isPHI() || LoopInst->getParent() != BB)  in getPrevMapVal()
1157     if (UseMI->isPHI()) {  in rewriteScheduledInstr()
1158       if (!Phi->isPHI() && UseMI->getOperand(0).getReg() == NewReg)  in rewriteScheduledInstr()
1170     if (StagePhi == StageSched && Phi->isPHI()) {  in rewriteScheduledInstr()
1175                (CyclePhi <= CycleSched || OrigMI->isPHI()))  in rewriteScheduledInstr()
1184     if (StagePhi > StageSched && Phi->isPHI())  in rewriteScheduledInstr()
1186     if (!InProlog && !Phi->isPHI() && StagePhi < StageSched)  in rewriteScheduledInstr()
1205   if (!Phi.isPHI())  in isLoopCarried()
1214   if (!Use || Use->isPHI())  in isLoopCarried()
1237       assert(MI.isPHI());  in EliminateDeadPhis()
1315     if (MI->isPHI())  in rewrite()
1335     if (MI.isPHI() || MI.isTerminator())  in rewrite()
1351     if (MI->isPHI()) {  in rewrite()
1374   if (!Producer->isPHI()) {  in remapUse()
1396   while (LoopProducer->isPHI() && LoopProducer->getParent() == BB) {  in remapUse()
1564       if (!MI->isPHI())  in KernelOperandInfo()
1628         assert(UseMI.isPHI());  in filterInstructions()
1649     if (MI.isPHI()) {  in moveStageBetweenBlocks()
1719         if (Use && Use->isPHI() && Use->getParent() == SourceBB) {  in moveStageBetweenBlocks()
1735     assert(CanonicalUse->isPHI());  in getPhiCanonicalReg()
1823         if (CanonicalUse->isPHI()) {  in peelPrologAndEpilogs()
1915   if (MI->isPHI()) {  in rewriteUsesOf()
1943       assert(UseMI.isPHI());  in rewriteUsesOf()
2056     if (NI->isPHI())  in validateAgainstModuloScheduleExpander()
2066     while (OI->isPHI() || OI->isFullCopy())  in validateAgainstModuloScheduleExpander()
2068     while (NI->isPHI() || NI->isFullCopy())  in validateAgainstModuloScheduleExpander()
2323     if (DefInst->isPHI()) {  in updateInstrUse()
2475     if (O.getParent()->getParent() == OrigKernel && O.getParent()->isPHI())  in mergeRegUsesAfterPipeline()
2523       if (MI->isPHI())  in generateProlog()
2559       if (MI->isPHI())  in generateKernel()
2599       if (MI->isPHI())  in generateEpilog()
2638     if (MI->isPHI())  in calcNumUnroll()
2649       if (DefMI->isPHI()) {  in calcNumUnroll()
2713           if (Ref.getParent() != BB || Ref.isPHI()) {  in canApply()