Lines Matching refs:Schedule

72   BB = Schedule.getLoop()->getTopBlock();  in expand()
79 for (MachineInstr *MI : Schedule.getInstructions()) { in expand()
80 int DefStage = Schedule.getStage(MI); in expand()
87 int UseStage = Schedule.getStage(UseMI); in expand()
113 unsigned MaxStageCount = Schedule.getNumStages() - 1; in generatePipelinedLoop()
137 for (MachineInstr *CI : Schedule.getInstructions()) { in generatePipelinedLoop()
140 unsigned StageNum = Schedule.getStage(CI); in generatePipelinedLoop()
222 if (Schedule.getStage(&*BBI) == StageNum) { in generateProlog()
300 if ((unsigned)Schedule.getStage(In) == StageNum) { in generateEpilog()
403 int StageScheduled = Schedule.getStage(&*BBI); in generateExistingPhis()
404 int LoopValStage = Schedule.getStage(MRI.getVRegDef(LoopVal)); in generateExistingPhis()
458 int PhiStage = Schedule.getStage(InstOp1); in generateExistingPhis()
464 int PhiOpStage = Schedule.getStage(InstOp1); in generateExistingPhis()
634 int StageScheduled = Schedule.getStage(&*BBI); in generatePhis()
1020 if (Schedule.getStage(LoopDef) > (signed)InstStageNum) in cloneAndChangeInstr()
1050 int DefStageNum = Schedule.getStage(Def); in updateInstruction()
1125 unsigned PhiStage = (unsigned)Schedule.getStage(MRI.getVRegDef(PhiDef)); in rewritePhiValues()
1126 unsigned LoopStage = (unsigned)Schedule.getStage(MRI.getVRegDef(LoopVal)); in rewritePhiValues()
1148 bool InProlog = (CurStageNum < (unsigned)Schedule.getNumStages() - 1); in rewriteScheduledInstr()
1149 int StagePhi = Schedule.getStage(Phi) + PhiNum; in rewriteScheduledInstr()
1166 int StageSched = Schedule.getStage(OrigMI); in rewriteScheduledInstr()
1167 int CycleSched = Schedule.getCycle(OrigMI); in rewriteScheduledInstr()
1171 int CyclePhi = Schedule.getCycle(Phi); in rewriteScheduledInstr()
1207 int DefCycle = Schedule.getCycle(&Phi); in isLoopCarried()
1208 int DefStage = Schedule.getStage(&Phi); in isLoopCarried()
1216 int LoopCycle = Schedule.getCycle(Use); in isLoopCarried()
1217 int LoopStage = Schedule.getStage(Use); in isLoopCarried()
1747 BitVector LS(Schedule.getNumStages(), true); in peelPrologAndEpilogs()
1748 BitVector AS(Schedule.getNumStages(), true); in peelPrologAndEpilogs()
1754 for (int I = 0; I < Schedule.getNumStages() - 1; ++I) { in peelPrologAndEpilogs()
1785 for (int I = 1; I <= Schedule.getNumStages() - 1; ++I) { in peelPrologAndEpilogs()
1788 filterInstructions(B, Schedule.getNumStages() - I); in peelPrologAndEpilogs()
1793 PhiNodeLoopIteration[&Phi] = Schedule.getNumStages() - I; in peelPrologAndEpilogs()
1799 unsigned Stage = Schedule.getNumStages() - 1 + I - J; in peelPrologAndEpilogs()
1960 int TC = Schedule.getNumStages() - 1; in fixupBranches()
1997 LoopInfo->adjustTripCount(-(Schedule.getNumStages() - 1)); in fixupBranches()
2005 KernelRewriter KR(*Schedule.getLoop(), Schedule, BB); in rewriteKernel()
2010 BB = Schedule.getLoop()->getTopBlock(); in expand()
2011 Preheader = Schedule.getLoop()->getLoopPreheader(); in expand()
2012 LLVM_DEBUG(Schedule.dump()); in expand()
2022 BB = Schedule.getLoop()->getTopBlock(); in validateAgainstModuloScheduleExpander()
2023 Preheader = Schedule.getLoop()->getLoopPreheader(); in validateAgainstModuloScheduleExpander()
2029 Schedule.print(OS); in validateAgainstModuloScheduleExpander()
2035 ModuloScheduleExpander MSE(MF, Schedule, *LIS, in validateAgainstModuloScheduleExpander()
2048 KernelRewriter KR(*Schedule.getLoop(), Schedule, BB); in validateAgainstModuloScheduleExpander()
2291 insertCondBranch(*Check, Schedule.getNumStages() + NumUnroll - 2, in generatePipelinedLoop()
2331 unsigned DefStageNum = Schedule.getStage(DefInst); in updateInstrUse()
2380 int StageNum = Schedule.getStage(OrigMI); in generatePhi()
2382 if (Schedule.getNumStages() - NumUnroll + UnrollNum - 1 >= StageNum) in generatePhi()
2384 else if (Schedule.getNumStages() - NumUnroll + UnrollNum == StageNum) in generatePhi()
2429 int PrologNum = Schedule.getNumStages() - NumUnroll + UnrollNum - 1; in generatePhi()
2518 PrologVRMap.resize(Schedule.getNumStages() - 1); in generateProlog()
2520 for (int PrologNum = 0; PrologNum < Schedule.getNumStages() - 1; in generateProlog()
2522 for (MachineInstr *MI : Schedule.getInstructions()) { in generateProlog()
2525 int StageNum = Schedule.getStage(MI); in generateProlog()
2558 for (MachineInstr *MI : Schedule.getInstructions()) { in generateKernel()
2561 int StageNum = Schedule.getStage(MI); in generateKernel()
2594 EpilogVRMap.resize(Schedule.getNumStages() - 1); in generateEpilog()
2596 for (int EpilogNum = 0; EpilogNum < Schedule.getNumStages() - 1; in generateEpilog()
2598 for (MachineInstr *MI : Schedule.getInstructions()) { in generateEpilog()
2601 int StageNum = Schedule.getStage(MI); in generateEpilog()
2634 for (unsigned I = 0; I < Schedule.getInstructions().size(); ++I) in calcNumUnroll()
2635 Inst2Idx[Schedule.getInstructions()[I]] = I; in calcNumUnroll()
2637 for (MachineInstr *MI : Schedule.getInstructions()) { in calcNumUnroll()
2640 int StageNum = Schedule.getStage(MI); in calcNumUnroll()
2655 NumUnrollLocal += StageNum - Schedule.getStage(DefMI); in calcNumUnroll()
2684 OrigKernel = Schedule.getLoop()->getTopBlock(); in expand()
2685 OrigPreheader = Schedule.getLoop()->getLoopPreheader(); in expand()
2686 OrigExit = Schedule.getLoop()->getExitBlock(); in expand()
2688 LLVM_DEBUG(Schedule.dump()); in expand()