Lines Matching refs:MONum
252 void visitMachineOperand(const MachineOperand *MO, unsigned MONum);
260 void report(const char *msg, const MachineOperand *MO, unsigned MONum,
278 void checkLiveness(const MachineOperand *MO, unsigned MONum);
279 void checkLivenessAtUse(const MachineOperand *MO, unsigned MONum,
283 void checkLivenessAtDef(const MachineOperand *MO, unsigned MONum,
577 unsigned MONum, LLT MOVRegType) { in report() argument
580 errs() << "- operand " << MONum << ": "; in report()
2379 MachineVerifier::visitMachineOperand(const MachineOperand *MO, unsigned MONum) { in visitMachineOperand() argument
2384 NumDefs = (MONum == 0 && MO->isReg()) ? NumDefs : 0; in visitMachineOperand()
2387 if (MONum < NumDefs) { in visitMachineOperand()
2388 const MCOperandInfo &MCOI = MCID.operands()[MONum]; in visitMachineOperand()
2390 report("Explicit definition must be a register", MO, MONum); in visitMachineOperand()
2392 report("Explicit definition marked as use", MO, MONum); in visitMachineOperand()
2394 report("Explicit definition marked as implicit", MO, MONum); in visitMachineOperand()
2395 } else if (MONum < MCID.getNumOperands()) { in visitMachineOperand()
2396 const MCOperandInfo &MCOI = MCID.operands()[MONum]; in visitMachineOperand()
2399 bool IsOptional = MI->isVariadic() && MONum == MCID.getNumOperands() - 1; in visitMachineOperand()
2403 report("Explicit operand marked as def", MO, MONum); in visitMachineOperand()
2405 report("Explicit operand marked as implicit", MO, MONum); in visitMachineOperand()
2411 report("Expected a register operand.", MO, MONum); in visitMachineOperand()
2416 report("Expected a non-register operand.", MO, MONum); in visitMachineOperand()
2420 int TiedTo = MCID.getOperandConstraint(MONum, MCOI::TIED_TO); in visitMachineOperand()
2423 report("Tied use must be a register", MO, MONum); in visitMachineOperand()
2425 report("Operand should be tied", MO, MONum); in visitMachineOperand()
2426 else if (unsigned(TiedTo) != MI->findTiedOperandIdx(MONum)) in visitMachineOperand()
2427 report("Tied def doesn't match MCInstrDesc", MO, MONum); in visitMachineOperand()
2437 report("Explicit operand should not be tied", MO, MONum); in visitMachineOperand()
2441 report("Extra explicit operand on non-variadic instruction", MO, MONum); in visitMachineOperand()
2450 report("Register operand must be marked debug", MO, MONum); in visitMachineOperand()
2452 report("Register operand must not be marked debug", MO, MONum); in visitMachineOperand()
2459 checkLiveness(MO, MONum); in visitMachineOperand()
2463 report("Undef virtual register def operands require a subregister", MO, MONum); in visitMachineOperand()
2467 unsigned OtherIdx = MI->findTiedOperandIdx(MONum); in visitMachineOperand()
2470 report("Must be tied to a register", MO, MONum); in visitMachineOperand()
2472 report("Missing tie flags on tied operand", MO, MONum); in visitMachineOperand()
2473 if (MI->findTiedOperandIdx(OtherIdx) != MONum) in visitMachineOperand()
2474 report("Inconsistent tie links", MO, MONum); in visitMachineOperand()
2475 if (MONum < MCID.getNumDefs()) { in visitMachineOperand()
2479 MO, MONum); in visitMachineOperand()
2482 report("Explicit def should be tied to implicit use", MO, MONum); in visitMachineOperand()
2497 MO->isUse() && MI->isRegTiedToDefOperand(MONum, &DefIdx) && in visitMachineOperand()
2499 report("Two-address instruction operands must be identical", MO, MONum); in visitMachineOperand()
2506 report("Illegal subregister index for physical register", MO, MONum); in visitMachineOperand()
2509 if (MONum < MCID.getNumOperands()) { in visitMachineOperand()
2511 TII->getRegClass(MCID, MONum, TRI, *MF)) { in visitMachineOperand()
2513 report("Illegal physical register for instruction", MO, MONum); in visitMachineOperand()
2521 report("isRenamable set on reserved register", MO, MONum); in visitMachineOperand()
2538 report("Generic virtual register use cannot be undef", MO, MONum); in visitMachineOperand()
2550 MO, MONum); in visitMachineOperand()
2558 MONum); in visitMachineOperand()
2569 MO, MONum); in visitMachineOperand()
2577 MONum); in visitMachineOperand()
2587 MONum); in visitMachineOperand()
2595 MONum < MCID.getNumOperands() && in visitMachineOperand()
2596 TII->getRegClass(MCID, MONum, TRI, *MF)) { in visitMachineOperand()
2598 MONum); in visitMachineOperand()
2601 TII->getRegClass(MCID, MONum, TRI, *MF)) in visitMachineOperand()
2612 report("Invalid subregister index for virtual register", MO, MONum); in visitMachineOperand()
2618 report("Invalid register class for subregister index", MO, MONum); in visitMachineOperand()
2624 if (MONum < MCID.getNumOperands()) { in visitMachineOperand()
2626 TII->getRegClass(MCID, MONum, TRI, *MF)) { in visitMachineOperand()
2631 report("No largest legal super class exists.", MO, MONum); in visitMachineOperand()
2636 report("No matching super-reg register class.", MO, MONum); in visitMachineOperand()
2641 report("Illegal virtual register for instruction", MO, MONum); in visitMachineOperand()
2658 report("PHI operand is not in the CFG", MO, MONum); in visitMachineOperand()
2692 report("Instruction loads from dead spill slot", MO, MONum); in visitMachineOperand()
2696 report("Instruction stores to dead spill slot", MO, MONum); in visitMachineOperand()
2704 report("CFI instruction has invalid index", MO, MONum); in visitMachineOperand()
2713 unsigned MONum, SlotIndex UseIdx, in checkLivenessAtUse() argument
2723 report("No live segment at use", MO, MONum); in checkLivenessAtUse()
2729 report("Live range continues after kill flag", MO, MONum); in checkLivenessAtUse()
2739 unsigned MONum, SlotIndex DefIdx, in checkLivenessAtDef() argument
2757 report("Inconsistent valno->def", MO, MONum); in checkLivenessAtDef()
2766 report("No live segment at def", MO, MONum); in checkLivenessAtDef()
2784 report("Live range continues after dead def flag", MO, MONum); in checkLivenessAtDef()
2794 void MachineVerifier::checkLiveness(const MachineOperand *MO, unsigned MONum) { in checkLiveness() argument
2805 report("Live interval for subreg operand has no subranges", MO, MONum); in checkLiveness()
2807 report("Virtual register has no live interval", MO, MONum); in checkLiveness()
2823 report("Kill missing from LiveVariables", MO, MONum); in checkLiveness()
2832 MI->getOperand(MONum + 1).getMBB()).getPrevSlot(); in checkLiveness()
2842 checkLivenessAtUse(MO, MONum, UseIdx, *LR, Unit); in checkLiveness()
2848 checkLivenessAtUse(MO, MONum, UseIdx, *LI, Reg); in checkLiveness()
2858 checkLivenessAtUse(MO, MONum, UseIdx, SR, Reg, SR.LaneMask); in checkLiveness()
2865 report("No live subrange at use", MO, MONum); in checkLiveness()
2871 report("Not all lanes of PHI source live at use", MO, MONum); in checkLiveness()
2911 report("Using an undefined physical register", MO, MONum); in checkLiveness()
2913 report("Reading virtual register without a def", MO, MONum); in checkLiveness()
2920 report("Using a killed virtual register", MO, MONum); in checkLiveness()
2938 report("Multiple virtual register defs in SSA form", MO, MONum); in checkLiveness()
2946 checkLivenessAtDef(MO, MONum, DefIdx, *LI, Reg); in checkLiveness()
2955 checkLivenessAtDef(MO, MONum, DefIdx, SR, Reg, true, SR.LaneMask); in checkLiveness()