96   struct MachineVerifier {  struct
97     MachineVerifier(MachineFunctionAnalysisManager &MFAM, const char *b)  in MachineVerifier()  argument
100     MachineVerifier(Pass *pass, const char *b) : PASS(pass), Banner(b) {}  in MachineVerifier()  function
102     MachineVerifier(const char *b, LiveVariables *LiveVars,  in MachineVerifier()  function
110     MachineFunctionAnalysisManager *MFAM = nullptr;
111     Pass *const PASS = nullptr;
112     const char *Banner;
113     const MachineFunction *MF = nullptr;
114     const TargetMachine *TM = nullptr;
115     const TargetInstrInfo *TII = nullptr;
116     const TargetRegisterInfo *TRI = nullptr;
117     const MachineRegisterInfo *MRI = nullptr;
118     const RegisterBankInfo *RBI = nullptr;
120     unsigned foundErrors = 0;
123     bool isFunctionRegBankSelected = false;
124     bool isFunctionSelected = false;
125     bool isFunctionTracksDebugUserValues = false;
127     using RegVector = SmallVector<Register, 16>;
128     using RegMaskVector = SmallVector<const uint32_t *, 4>;
129     using RegSet = DenseSet<Register>;
130     using RegMap = DenseMap<Register, const MachineInstr *>;
131     using BlockSet = SmallPtrSet<const MachineBasicBlock *, 8>;
133     const MachineInstr *FirstNonPHI = nullptr;
134     const MachineInstr *FirstTerminator = nullptr;
135     BlockSet FunctionBlocks;
137     BitVector regsReserved;
138     RegSet regsLive;
139     RegVector regsDefined, regsDead, regsKilled;
140     RegMaskVector regMasks;
142     SlotIndex lastIndex;
145     void addRegWithSubRegs(RegVector &RV, Register Reg) {  in addRegWithSubRegs()
151     struct BBInfo {
214     DenseMap<const MachineBasicBlock*, BBInfo> MBBInfoMap;
216     bool isReserved(Register Reg) {  in isReserved()
220     bool isAllocatable(Register Reg) const {  in isAllocatable()
226     LiveVariables *LiveVars = nullptr;
227     LiveIntervals *LiveInts = nullptr;
228     LiveStacks *LiveStks = nullptr;
229     SlotIndexes *Indexes = nullptr;
234     MachineDominatorTree DT;