Lines Matching refs:UseMI

669 static bool getDataDeps(const MachineInstr &UseMI,  in getDataDeps()  argument
673 if (UseMI.isDebugInstr()) in getDataDeps()
677 for (const MachineOperand &MO : UseMI.operands()) { in getDataDeps()
697 static void getPHIDeps(const MachineInstr &UseMI, in getPHIDeps() argument
704 assert(UseMI.isPHI() && UseMI.getNumOperands() % 2 && "Bad PHI"); in getPHIDeps()
705 for (unsigned i = 1; i != UseMI.getNumOperands(); i += 2) { in getPHIDeps()
706 if (UseMI.getOperand(i + 1).getMBB() == Pred) { in getPHIDeps()
707 Register Reg = UseMI.getOperand(i).getReg(); in getPHIDeps()
716 static void updatePhysDepsDownwards(const MachineInstr *UseMI, in updatePhysDepsDownwards() argument
723 for (const MachineOperand &MO : UseMI->operands()) { in updatePhysDepsDownwards()
756 TRI->regunits(UseMI->getOperand(DefOp).getReg().asMCReg())) { in updatePhysDepsDownwards()
758 LRU.MI = UseMI; in updatePhysDepsDownwards()
795 updateDepth(MachineTraceMetrics::TraceBlockInfo &TBI, const MachineInstr &UseMI, in updateDepth() argument
799 if (UseMI.isPHI()) in updateDepth()
800 getPHIDeps(UseMI, Deps, TBI.Pred, MTM.MRI); in updateDepth()
801 else if (getDataDeps(UseMI, Deps, MTM.MRI)) in updateDepth()
802 updatePhysDepsDownwards(&UseMI, Deps, RegUnits, MTM.TRI); in updateDepth()
817 .computeOperandLatency(Dep.DefMI, Dep.DefOp, &UseMI, Dep.UseOp); in updateDepth()
821 InstrCycles &MICycles = Cycles[&UseMI]; in updateDepth()
827 LLVM_DEBUG(dbgs() << TBI.CriticalPath << '\t' << Cycle << '\t' << UseMI); in updateDepth()
829 LLVM_DEBUG(dbgs() << Cycle << '\t' << UseMI); in updateDepth()
834 updateDepth(const MachineBasicBlock *MBB, const MachineInstr &UseMI, in updateDepth() argument
836 updateDepth(BlockInfo[MBB->getNumber()], UseMI, RegUnits); in updateDepth()
896 for (const auto &UseMI : *MBB) { in computeInstrDepths()
897 updateDepth(TBI, UseMI, RegUnits); in computeInstrDepths()
962 static bool pushDepHeight(const DataDep &Dep, const MachineInstr &UseMI, in pushDepHeight() argument
968 UseHeight += SchedModel.computeOperandLatency(Dep.DefMI, Dep.DefOp, &UseMI, in pushDepHeight()
1283 const MachineInstr &UseMI) const { in isDepInTrace()
1284 if (DefMI.getParent() == UseMI.getParent()) in isDepInTrace()
1288 const TraceBlockInfo &TBI = TE.BlockInfo[UseMI.getParent()->getNumber()]; in isDepInTrace()