Lines Matching refs:MODef
429 const MachineOperand &MODef, Register Def);
660 const MachineInstr &MI, const MachineOperand &MODef, Register Def) { in hasOverlappingMultipleDef() argument
662 if ((&MIDef != &MODef) && MIDef.isReg() && in hasOverlappingMultipleDef()
995 MachineOperand &MODef = MI.getOperand(OpIdx); in propagateDefs() local
997 if (!MODef.isReg() || MODef.isUse()) in propagateDefs()
1001 if (MODef.isTied() || MODef.isUndef() || MODef.isImplicit()) in propagateDefs()
1004 if (!MODef.getReg()) in propagateDefs()
1008 if (!MODef.isRenamable()) in propagateDefs()
1012 MI, MODef.getReg().asMCReg(), *TRI, *TII, UseCopyInstr); in propagateDefs()
1021 if (MODef.getReg() != Src) in propagateDefs()
1027 if (hasImplicitOverlap(MI, MODef)) in propagateDefs()
1030 if (hasOverlappingMultipleDef(MI, MODef, Def)) in propagateDefs()
1033 LLVM_DEBUG(dbgs() << "MCP: Replacing " << printReg(MODef.getReg(), TRI) in propagateDefs()
1037 MODef.setReg(Def); in propagateDefs()
1038 MODef.setIsRenamable(CopyOperands->Destination->isRenamable()); in propagateDefs()