54         "Verify that the generated patterns are ordered by increasing latency"),
60         "Verify that the generated patterns are ordered by increasing latency"),
125                           SmallVector<unsigned, 16> &Patterns);
342   // FIXME: for now, we don't do any check for the register pressure patterns.  in reduceRegisterPressure()
524 // later patterns. This helps to discover sub-optimal pattern orderings.
527                                          SmallVector<unsigned, 16> &Patterns) {  in verifyPatternOrder()  argument
530   for (auto P : Patterns) {  in verifyPatternOrder()
581     SmallVector<unsigned, 16> Patterns;  in combineInstructions()  local
602     // The algorithm does not try to evaluate all patterns and pick the best.  in combineInstructions()
604     // mostly one pattern, and getMachineCombinerPatterns() can order patterns  in combineInstructions()
606     // machine-combiner-verify-pattern-order is enabled, all patterns are  in combineInstructions()
607     // checked to ensure later patterns do not provide better latency savings.  in combineInstructions()
609     if (!TII->getMachineCombinerPatterns(MI, Patterns, DoRegPressureReduce))  in combineInstructions()
613       verifyPatternOrder(MBB, MI, Patterns);  in combineInstructions()
615     for (const auto P : Patterns) {  in combineInstructions()