Lines Matching full:cse

50 #define DEBUG_TYPE "machine-cse"
68 "aggressive-machine-cse", cl::Hidden, cl::init(false),
69 cl::desc("Override the profitability heuristics for Machine CSE"));
194 // FIXME: We should trivially coalesce subregister copies to expose CSE in INITIALIZE_PASS_DEPENDENCY()
196 // cse-add-with-overflow.ll). This can be done here as follows: in INITIALIZE_PASS_DEPENDENCY()
388 // Don't attempt to CSE across such an instruction. in PhysRegDefsReach()
450 // If CSReg is used at all uses of Reg, CSE should not increase register in isProfitableToCSE()
476 // Heuristics #1: Don't CSE "cheap" computation if the def is not local or in in isProfitableToCSE()
486 // of the redundant computation are copies, do not cse. in isProfitableToCSE()
545 // Using trivial copy propagation to find more CSE opportunities. in ProcessBlockCSE()
553 // Try again to see if CSE is possible. in ProcessBlockCSE()
610 // Prevent CSE-ing non-local convergent instructions. in ProcessBlockCSE()
612 // that non-local CSE is illegal. The following check extends the definition in ProcessBlockCSE()
617 // CSE-ing the subset of `isConvergent` instructions which do fall into this in ProcessBlockCSE()
621 "different BBs, avoid CSE!\n"); in ProcessBlockCSE()
627 // Check if it's profitable to perform this CSE. in ProcessBlockCSE()
654 "Do not CSE physical register defs!"); in ProcessBlockCSE()
657 LLVM_DEBUG(dbgs() << "*** Not profitable, avoid CSE!\n"); in ProcessBlockCSE()
662 // Don't perform CSE if the result of the new instruction cannot exist in ProcessBlockCSE()
667 dbgs() << "*** Not the same register constraints, avoid CSE!\n"); in ProcessBlockCSE()
789 // Now perform CSE. in PerformCSE()
802 // We use stronger checks for PRE candidate rather than for CSE ones to embrace
905 // anticipating that the next CSE step will eliminate this created redundancy.
906 // If CSE doesn't eliminate this, than created instruction will remain dead