Lines Matching +full:cold +full:- +full:temp
1 //===-- llvm/CodeGen/MachineBasicBlock.cpp ----------------------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
30 #include "llvm/Config/llvm-config.h"
46 "print-slotindexes",
52 : BB(B), Number(-1), xParent(&MF) { in MachineBasicBlock()
55 IrrLoopHeaderWeight = B->getIrrLoopHeaderWeight(); in MachineBasicBlock()
64 MCContext &Ctx = MF->getContext(); in getSymbol()
66 // We emit a non-temporary symbol -- with a descriptive name -- if it begins in getSymbol()
67 // a section (with basic block sections). Otherwise we fall back to use temp in getSymbol()
69 if (MF->hasBBSections() && isBeginSection()) { in getSymbol()
72 Suffix += ".cold"; in getSymbol()
81 CachedMCSymbol = Ctx.getOrCreateSymbol(MF->getName() + Suffix); in getSymbol()
86 "BB" + Twine(MF->getFunctionNumber()) + "_" + Twine(getNumber()), in getSymbol()
98 << "$ehgcr_" << MF->getFunctionNumber() << '_' << getNumber(); in getEHCatchretSymbol()
99 CachedEHCatchretMCSymbol = MF->getContext().getOrCreateSymbol(SymbolName); in getEHCatchretSymbol()
107 MCContext &Ctx = MF->getContext(); in getEndSymbol()
109 "BB_END" + Twine(MF->getFunctionNumber()) + "_" + Twine(getNumber()), in getEndSymbol()
128 /// MBBs start out as #-1. When a MBB is added to a MachineFunction, it
130 /// MachineFunction, it goes back to being #-1.
133 MachineFunction &MF = *N->getParent(); in addNodeToList()
134 N->Number = MF.addToMBBNumbering(N); in addNodeToList()
138 for (MachineInstr &MI : N->instrs()) in addNodeToList()
144 N->getParent()->removeFromMBBNumbering(N->Number); in removeNodeFromList()
145 N->Number = -1; in removeNodeFromList()
151 assert(!N->getParent() && "machine instruction already in a basic block"); in addNodeToList()
152 N->setParent(Parent); in addNodeToList()
156 MachineFunction *MF = Parent->getParent(); in addNodeToList()
157 N->addRegOperandsToUseLists(MF->getRegInfo()); in addNodeToList()
158 MF->handleInsertion(*N); in addNodeToList()
164 assert(N->getParent() && "machine instruction not in a basic block"); in removeNodeFromList()
167 if (MachineFunction *MF = N->getMF()) { in removeNodeFromList()
168 MF->handleRemoval(*N); in removeNodeFromList()
169 N->removeRegOperandsFromUseLists(MF->getRegInfo()); in removeNodeFromList()
172 N->setParent(nullptr); in removeNodeFromList()
180 assert(Parent->getParent() == FromList.Parent->getParent() && in transferNodesFromList()
192 First->setParent(Parent); in transferNodesFromList()
196 assert(!MI->getParent() && "MI is still in a block!"); in deleteNode()
197 Parent->getParent()->deleteMachineInstr(MI); in deleteNode()
202 while (I != E && I->isPHI()) in getFirstNonPHI()
204 assert((I == E || !I->isInsideBundle()) && in getFirstNonPHI()
205 "First non-phi MI cannot be inside a bundle!"); in getFirstNonPHI()
211 const TargetInstrInfo *TII = getParent()->getSubtarget().getInstrInfo(); in SkipPHIsAndLabels()
214 while (I != E && (I->isPHI() || I->isPosition() || in SkipPHIsAndLabels()
215 TII->isBasicBlockPrologue(*I))) in SkipPHIsAndLabels()
219 assert((I == E || !I->isInsideBundle()) && in SkipPHIsAndLabels()
220 "First non-phi / non-label instruction is inside a bundle!"); in SkipPHIsAndLabels()
227 const TargetInstrInfo *TII = getParent()->getSubtarget().getInstrInfo(); in SkipPHIsLabelsAndDebug()
230 while (I != E && (I->isPHI() || I->isPosition() || I->isDebugInstr() || in SkipPHIsLabelsAndDebug()
231 (SkipPseudoOp && I->isPseudoProbe()) || in SkipPHIsLabelsAndDebug()
232 TII->isBasicBlockPrologue(*I, Reg))) in SkipPHIsLabelsAndDebug()
236 assert((I == E || !I->isInsideBundle()) && in SkipPHIsLabelsAndDebug()
237 "First non-phi / non-label / non-debug " in SkipPHIsLabelsAndDebug()
244 while (I != B && ((--I)->isTerminator() || I->isDebugInstr())) in getFirstTerminator()
246 while (I != E && !I->isTerminator()) in getFirstTerminator()
253 while (I != B && ((--I)->isTerminator() || I->isDebugInstr())) in getFirstInstrTerminator()
255 while (I != E && !I->isTerminator()) in getFirstInstrTerminator()
266 // Skip over begin-of-block dbg_value instructions. in getFirstNonDebugInstr()
272 // Skip over end-of-block dbg_value instructions. in getLastNonDebugInstr()
275 --I; in getLastNonDebugInstr()
277 if (I->isDebugInstr() || I->isInsideBundle()) in getLastNonDebugInstr()
279 if (SkipPseudoOp && I->isPseudoProbe()) in getLastNonDebugInstr()
289 if (Succ->isEHPad()) in hasEHPadSuccessor()
295 return getParent()->begin() == getIterator(); in isEntryBlock()
306 if (Succ->isInlineAsmBrIndirectTarget()) in mayHaveInlineAsmBr()
320 return LBB->hasName(); in hasName()
326 return LBB->getName(); in getName()
335 Name = (getParent()->getName() + ":").str(); in getFullName()
337 Name += getBasicBlock()->getName(); in getFullName()
351 const Function &F = MF->getFunction(); in print()
369 OS << Indexes->getMBBStartIdx(this) << '\t'; in print()
374 const TargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo(); in print()
375 const MachineRegisterInfo &MRI = MF->getRegInfo(); in print()
376 const TargetInstrInfo &TII = *getParent()->getSubtarget().getInstrInfo(); in print()
441 if (Indexes->hasIndex(MI)) in print()
442 OS << Indexes->getInstructionIndex(MI); in print()
474 /// bb.{number}[.{ir-name}] [(attributes...)]
476 /// The {ir-name} is only printed when the \ref PrintNameIr flag is passed
478 /// numerically using the attribute syntax as "(%ir-block.{ir-slot})".
494 os << "%ir-block."; in printName()
495 if (bb->hasName()) { in printName()
496 os << bb->getName(); in printName()
498 int slot = -1; in printName()
501 slot = moduleSlotTracker->getLocalSlot(bb); in printName()
502 } else if (bb->getParent()) { in printName()
503 ModuleSlotTracker tmpTracker(bb->getModule(), false); in printName()
504 tmpTracker.incorporateFunction(*bb->getParent()); in printName()
508 if (slot == -1) in printName()
509 os << "<ir-block badref>"; in printName()
517 if (bb->hasName()) { in printName()
518 os << '.' << bb->getName(); in printName()
530 os << "machine-block-address-taken"; in printName()
535 os << "ir-block-address-taken "; in printName()
541 os << "landing-pad"; in printName()
546 os << "inlineasm-br-indirect-target"; in printName()
551 os << "ehfunclet-entry"; in printName()
566 case MBBSectionID::SectionType::Cold: in printName()
567 os << "Cold"; in printName()
576 os << "bb_id " << getBBID()->BaseID; in printName()
577 if (getBBID()->CloneID != 0) in printName()
578 os << " " << getBBID()->CloneID; in printName()
583 os << "call-frame-size " << CallFrameSize; in printName()
604 I->LaneMask &= ~LaneMask; in removeLiveIn()
605 if (I->LaneMask.none()) in removeLiveIn()
611 // Get non-const version of iterator. in removeLiveIn()
612 LiveInVector::iterator LI = LiveIns.begin() + (I - LiveIns.begin()); in removeLiveIn()
619 return I != livein_end() && (I->LaneMask & LaneMask).any(); in isLiveIn()
632 MCRegister PhysReg = I->PhysReg; in sortUniqueLiveIns()
633 LaneBitmask LaneMask = I->LaneMask; in sortUniqueLiveIns()
634 for (J = std::next(I); J != LiveIns.end() && J->PhysReg == PhysReg; ++J) in sortUniqueLiveIns()
635 LaneMask |= J->LaneMask; in sortUniqueLiveIns()
636 Out->PhysReg = PhysReg; in sortUniqueLiveIns()
637 Out->LaneMask = LaneMask; in sortUniqueLiveIns()
647 assert((isEHPad() || this == &getParent()->front()) && in addLiveIn()
652 MachineRegisterInfo &MRI = getParent()->getRegInfo(); in addLiveIn()
653 const TargetInstrInfo &TII = *getParent()->getSubtarget().getInstrInfo(); in addLiveIn()
657 for (;I != E && I->isCopy(); ++I) in addLiveIn()
658 if (I->getOperand(1).getReg() == PhysReg) { in addLiveIn()
659 Register VirtReg = I->getOperand(0).getReg(); in addLiveIn()
661 llvm_unreachable("Incompatible live-in register class."); in addLiveIn()
675 getParent()->splice(NewAfter->getIterator(), getIterator()); in moveBefore()
679 getParent()->splice(++NewBefore->getIterator(), getIterator()); in moveAfter()
685 return -1; in findJumpTableIndex()
687 const TargetInstrInfo *TII = MBB.getParent()->getSubtarget().getInstrInfo(); in findJumpTableIndex()
688 return TII->getJumpTableIndex(Terminator); in findJumpTableIndex()
696 const TargetInstrInfo *TII = getParent()->getSubtarget().getInstrInfo(); in updateTerminator()
697 // A block with no successors has no concerns with fall-through edges. in updateTerminator()
698 if (this->succ_empty()) in updateTerminator()
704 bool B = TII->analyzeBranch(*this, TBB, FBB, Cond); in updateTerminator()
712 TII->removeBranch(*this); in updateTerminator()
722 PreviousLayoutSuccessor->isEHPad()) in updateTerminator()
728 TII->insertBranch(*this, PreviousLayoutSuccessor, nullptr, Cond, DL); in updateTerminator()
734 // The block has a non-fallthrough conditional branch. If one of its in updateTerminator()
738 if (TII->reverseBranchCondition(Cond)) in updateTerminator()
740 TII->removeBranch(*this); in updateTerminator()
741 TII->insertBranch(*this, FBB, nullptr, Cond, DL); in updateTerminator()
743 TII->removeBranch(*this); in updateTerminator()
744 TII->insertBranch(*this, TBB, nullptr, Cond, DL); in updateTerminator()
751 assert(!PreviousLayoutSuccessor->isEHPad()); in updateTerminator()
758 TII->removeBranch(*this); in updateTerminator()
761 TII->insertBranch(*this, TBB, nullptr, Cond, DL); in updateTerminator()
768 if (TII->reverseBranchCondition(Cond)) { in updateTerminator()
771 TII->insertBranch(*this, PreviousLayoutSuccessor, nullptr, Cond, DL); in updateTerminator()
774 TII->removeBranch(*this); in updateTerminator()
775 TII->insertBranch(*this, PreviousLayoutSuccessor, nullptr, Cond, DL); in updateTerminator()
777 TII->removeBranch(*this); in updateTerminator()
778 TII->insertBranch(*this, TBB, PreviousLayoutSuccessor, Cond, DL); in updateTerminator()
790 assert((uint64_t)std::abs(Sum - BranchProbability::getDenominator()) <= in validateSuccProbs()
803 Succ->addPredecessor(this); in addSuccessor()
812 Succ->addPredecessor(this); in addSuccessorWithoutProb()
826 // preserves the probabilities as-is and then we can renormalize them and in splitSuccessor()
853 (*I)->removePredecessor(this); in removeSuccessor()
881 Old->removePredecessor(this); in replaceSuccessor()
882 New->addPredecessor(this); in replaceSuccessor()
891 if (!ProbIter->isUnknown()) in replaceSuccessor()
899 if (!Orig->Probs.empty()) in copySuccessor()
900 addSuccessor(*I, Orig->getSuccProbability(I)); in copySuccessor()
919 while (!FromMBB->succ_empty()) { in transferSuccessors()
920 MachineBasicBlock *Succ = *FromMBB->succ_begin(); in transferSuccessors()
924 if (!FromMBB->Probs.empty()) { in transferSuccessors()
925 auto Prob = *FromMBB->Probs.begin(); in transferSuccessors()
930 FromMBB->removeSuccessor(Succ); in transferSuccessors()
939 while (!FromMBB->succ_empty()) { in transferSuccessorsAndUpdatePHIs()
940 MachineBasicBlock *Succ = *FromMBB->succ_begin(); in transferSuccessorsAndUpdatePHIs()
941 if (!FromMBB->Probs.empty()) { in transferSuccessorsAndUpdatePHIs()
942 auto Prob = *FromMBB->Probs.begin(); in transferSuccessorsAndUpdatePHIs()
946 FromMBB->removeSuccessor(Succ); in transferSuccessorsAndUpdatePHIs()
949 Succ->replacePhiUsesWith(FromMBB, this); in transferSuccessorsAndUpdatePHIs()
979 if (Fallthrough == getParent()->end()) in getFallThrough()
989 const TargetInstrInfo *TII = getParent()->getSubtarget().getInstrInfo(); in getFallThrough()
990 if (TII->analyzeBranch(*this, TBB, FBB, Cond)) { in getFallThrough()
996 return (empty() || !back().isBarrier() || TII->isPredicated(back())) in getFallThrough()
1041 LiveRegs.init(*MF->getSubtarget().getRegisterInfo()); in splitAt()
1047 MachineBasicBlock *SplitBB = MF->CreateMachineBasicBlock(getBasicBlock()); in splitAt()
1049 MF->insert(++MachineFunction::iterator(this), SplitBB); in splitAt()
1050 SplitBB->splice(SplitBB->begin(), this, SplitPoint, end()); in splitAt()
1052 SplitBB->transferSuccessorsAndUpdatePHIs(this); in splitAt()
1059 LIS->insertMBBInMaps(SplitBB); in splitAt()
1085 for (MachineBasicBlock *Pred : MBB->predecessors()) { in jumpTableHasOtherUses()
1123 Indexes->insertMachineInstrInMaps(*MI); in ~SlotIndexUpdateDelegate()
1134 Indexes->removeMachineInstrFromMaps(MI); in MF_HandleRemoval()
1141 auto *Wrapper = P->getAnalysisIfAvailable<RESULT##INFIX##WrapperPass>(); \
1142 return Wrapper ? &Wrapper->GETTER() : nullptr; \
1144 return MFAM->getCachedResult<RESULT##Analysis>(*MF); \
1157 MachineBasicBlock *NMBB = MF->CreateMachineBasicBlock(); in SplitCriticalEdge()
1158 NMBB->setCallFrameSize(Succ->getCallFrameSize()); in SplitCriticalEdge()
1164 MachineJumpTableInfo &MJTI = *MF->getJumpTableInfo(); in SplitCriticalEdge()
1169 MF->insert(std::next(MachineFunction::iterator(this)), NMBB); in SplitCriticalEdge()
1171 << " -- " << printMBBReference(*NMBB) << " -- " in SplitCriticalEdge()
1177 LIS->insertMBBInMaps(NMBB); in SplitCriticalEdge()
1179 Indexes->insertMBBInMaps(NMBB); in SplitCriticalEdge()
1195 if (Reg.isPhysical() || LV->getVarInfo(Reg).removeKill(MI)) { in SplitCriticalEdge()
1231 NMBB->addSuccessor(Succ); in SplitCriticalEdge()
1232 if (!NMBB->isLayoutSuccessor(Succ)) { in SplitCriticalEdge()
1235 const TargetInstrInfo *TII = getParent()->getSubtarget().getInstrInfo(); in SplitCriticalEdge()
1240 // number, the scope and non-zero column and line number is same with that in SplitCriticalEdge()
1245 TII->insertBranch(*NMBB, Succ, nullptr, Cond, DL); in SplitCriticalEdge()
1249 Succ->replacePhiUsesWith(this, NMBB); in SplitCriticalEdge()
1251 // Inherit live-ins from the successor in SplitCriticalEdge()
1252 for (const auto &LI : Succ->liveins()) in SplitCriticalEdge()
1253 NMBB->addLiveIn(LI); in SplitCriticalEdge()
1256 const TargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo(); in SplitCriticalEdge()
1262 if (!(--I)->addRegisterKilled(Reg, TRI, /* AddIfNotFound= */ false)) in SplitCriticalEdge()
1265 LV->getVarInfo(Reg).Kills.push_back(&*I); in SplitCriticalEdge()
1270 // Update relevant live-through information. in SplitCriticalEdge()
1272 LV->addNewBlock(NMBB, this, Succ, *LiveInSets); in SplitCriticalEdge()
1274 LV->addNewBlock(NMBB, this, Succ); in SplitCriticalEdge()
1286 std::next(MachineFunction::iterator(NMBB)) == getParent()->end(); in SplitCriticalEdge()
1288 SlotIndex StartIndex = Indexes->getMBBEndIdx(this); in SplitCriticalEdge()
1290 SlotIndex EndIndex = Indexes->getMBBEndIdx(NMBB); in SplitCriticalEdge()
1295 I = Succ->instr_begin(), E = Succ->instr_end(); in SplitCriticalEdge()
1296 I != E && I->isPHI(); ++I) { in SplitCriticalEdge()
1297 for (unsigned ni = 1, ne = I->getNumOperands(); ni != ne; ni += 2) { in SplitCriticalEdge()
1298 if (I->getOperand(ni+1).getMBB() == NMBB) { in SplitCriticalEdge()
1299 MachineOperand &MO = I->getOperand(ni); in SplitCriticalEdge()
1305 LiveInterval &LI = LIS->getInterval(Reg); in SplitCriticalEdge()
1316 MachineRegisterInfo *MRI = &getParent()->getRegInfo(); in SplitCriticalEdge()
1317 for (unsigned i = 0, e = MRI->getNumVirtRegs(); i != e; ++i) { in SplitCriticalEdge()
1319 if (PHISrcRegs.count(Reg) || !LIS->hasInterval(Reg)) in SplitCriticalEdge()
1322 LiveInterval &LI = LIS->getInterval(Reg); in SplitCriticalEdge()
1326 bool isLiveOut = LI.liveAt(LIS->getMBBStartIdx(Succ)); in SplitCriticalEdge()
1346 LIS->repairIntervalsInRange(this, getFirstTerminator(), end(), UsedRegs); in SplitCriticalEdge()
1350 MDT->recordSplitCriticalEdge(this, Succ, NMBB); in SplitCriticalEdge()
1353 if (MachineLoop *TIL = MLI->getLoopFor(this)) { in SplitCriticalEdge()
1356 if (MachineLoop *DestLoop = MLI->getLoopFor(Succ)) { in SplitCriticalEdge()
1359 DestLoop->addBasicBlockToLoop(NMBB, *MLI); in SplitCriticalEdge()
1360 } else if (TIL->contains(DestLoop)) { in SplitCriticalEdge()
1362 TIL->addBasicBlockToLoop(NMBB, *MLI); in SplitCriticalEdge()
1363 } else if (DestLoop->contains(TIL)) { in SplitCriticalEdge()
1365 DestLoop->addBasicBlockToLoop(NMBB, *MLI); in SplitCriticalEdge()
1371 assert(DestLoop->getHeader() == Succ && in SplitCriticalEdge()
1373 if (MachineLoop *P = DestLoop->getParentLoop()) in SplitCriticalEdge()
1374 P->addBasicBlockToLoop(NMBB, *MLI); in SplitCriticalEdge()
1384 // Splitting the critical edge to a landing pad block is non-trivial. Don't do in canSplitCriticalEdge()
1386 if (Succ->isEHPad()) in canSplitCriticalEdge()
1391 if (Succ->isInlineAsmBrIndirectTarget()) in canSplitCriticalEdge()
1397 if (MF->getTarget().requiresStructuredCFG()) in canSplitCriticalEdge()
1407 const TargetInstrInfo *TII = MF->getSubtarget().getInstrInfo(); in canSplitCriticalEdge()
1411 if (TII->analyzeBranch(*const_cast<MachineBasicBlock *>(this), TBB, FBB, Cond, in canSplitCriticalEdge()
1431 if (MI->isBundledWithSucc() && !MI->isBundledWithPred()) in unbundleSingleMI()
1432 MI->unbundleFromSucc(); in unbundleSingleMI()
1434 if (MI->isBundledWithPred() && !MI->isBundledWithSucc()) in unbundleSingleMI()
1435 MI->unbundleFromPred(); in unbundleSingleMI()
1448 MI->clearFlag(MachineInstr::BundledPred); in remove_instr()
1449 MI->clearFlag(MachineInstr::BundledSucc); in remove_instr()
1455 assert(!MI->isBundledWithPred() && !MI->isBundledWithSucc() && in insert()
1458 if (I != instr_end() && I->isBundledWithPred()) { in insert()
1459 MI->setFlag(MachineInstr::BundledPred); in insert()
1460 MI->setFlag(MachineInstr::BundledSucc); in insert()
1469 getParent()->remove(this); in removeFromParent()
1476 getParent()->erase(this); in eraseFromParent()
1487 --I; in ReplaceUsesOfBlockWith()
1488 if (!I->isTerminator()) break; in ReplaceUsesOfBlockWith()
1492 for (MachineOperand &MO : I->operands()) in ReplaceUsesOfBlockWith()
1518 return MBBI->getDebugLoc(); in findDebugLoc()
1527 if (!MBBI->isDebugInstr()) in rfindDebugLoc()
1528 return MBBI->getDebugLoc(); in rfindDebugLoc()
1539 if (!MBBI->isDebugInstr()) in findPrevDebugLoc()
1540 return MBBI->getDebugLoc(); in findPrevDebugLoc()
1550 return MBBI->getDebugLoc(); in rfindPrevDebugLoc()
1560 while (TI != end() && !TI->isBranch()) in findBranchDebugLoc()
1564 DL = TI->getDebugLoc(); in findBranchDebugLoc()
1566 if (TI->isBranch()) in findBranchDebugLoc()
1567 DL = DILocation::getMergedLocation(DL, TI->getDebugLoc()); in findBranchDebugLoc()
1590 return Sum.getCompl() / (Probs.size() - KnownProbNum); in getSuccProbability()
1638 if (I->isDebugOrPseudoInstr()) in computeRegisterLiveness()
1641 --N; in computeRegisterLiveness()
1657 for (const MachineBasicBlock::RegisterMaskPair &LI : S->liveins()) { in computeRegisterLiveness()
1658 if (TRI->regsOverlap(LI.PhysReg, Reg)) in computeRegisterLiveness()
1674 --I; in computeRegisterLiveness()
1676 if (I->isDebugOrPseudoInstr()) in computeRegisterLiveness()
1679 --N; in computeRegisterLiveness()
1710 while (I != begin() && std::prev(I)->isDebugOrPseudoInstr()) in computeRegisterLiveness()
1711 --I; in computeRegisterLiveness()
1715 // If so, the register's state is definitely defined by the live-in state. in computeRegisterLiveness()
1717 if (TRI->regsOverlap(LI.PhysReg, Reg)) in computeRegisterLiveness()
1730 return isEHFuncletEntry() ? TRI->getNoPreservedMask() : nullptr; in getBeginClobberMask()
1737 // care what kind of return it is, putting a mask after it is a no-op. in getEndClobberMask()
1738 return isReturnBlock() && !succ_empty() ? TRI->getNoPreservedMask() : nullptr; in getEndClobberMask()
1752 assert(getParent()->getProperties().hasProperty( in livein_begin()
1785 const MBBSectionID MBBSectionID::ColdSectionID(MBBSectionID::SectionType::Cold);