Lines Matching refs:InL
5193 Register InL = MRI.createGenericVirtualRegister(HalfTy); in narrowScalarShiftByConstant() local
5195 MIRBuilder.buildUnmerge({InL, InH}, MI.getOperand(1)); in narrowScalarShiftByConstant()
5198 MIRBuilder.buildMergeLikeInstr(MI.getOperand(0), {InL, InH}); in narrowScalarShiftByConstant()
5213 Hi = MIRBuilder.buildShl(NVT, InL, in narrowScalarShiftByConstant()
5217 Hi = InL; in narrowScalarShiftByConstant()
5219 Lo = MIRBuilder.buildShl(NVT, InL, MIRBuilder.buildConstant(AmtTy, Amt)); in narrowScalarShiftByConstant()
5223 NVT, InL, MIRBuilder.buildConstant(AmtTy, -Amt + NVTBits)); in narrowScalarShiftByConstant()
5239 auto OrLHS = MIRBuilder.buildLShr(NVT, InL, ShiftAmtConst); in narrowScalarShiftByConstant()
5262 auto OrLHS = MIRBuilder.buildLShr(NVT, InL, ShiftAmtConst); in narrowScalarShiftByConstant()
5316 Register InL = MRI.createGenericVirtualRegister(HalfTy); in narrowScalarShift() local
5318 MIRBuilder.buildUnmerge({InL, InH}, MI.getOperand(1)); in narrowScalarShift()
5331 auto LoS = MIRBuilder.buildShl(HalfTy, InL, Amt); in narrowScalarShift()
5333 auto LoOr = MIRBuilder.buildLShr(HalfTy, InL, AmtLack); in narrowScalarShift()
5339 auto HiL = MIRBuilder.buildShl(HalfTy, InL, AmtExcess); // Hi from Lo part. in narrowScalarShift()
5354 auto LoOr = MIRBuilder.buildLShr(HalfTy, InL, Amt); in narrowScalarShift()
5370 HalfTy, IsZero, InL, MIRBuilder.buildSelect(HalfTy, IsShort, LoS, LoL)); in narrowScalarShift()