Lines Matching refs:OpInfo
58 void update(const TargetLowering::AsmOperandInfo &OpInfo) { in update() argument
63 if (OpInfo.ConstraintType == TargetLowering::C_Memory || in update()
64 OpInfo.ConstraintType == TargetLowering::C_Other) { in update()
65 if (OpInfo.Type == InlineAsm::isInput) in update()
67 else if (OpInfo.Type == InlineAsm::isOutput) in update()
69 else if (OpInfo.Type == InlineAsm::isClobber) in update()
82 GISelAsmOperandInfo &OpInfo, in getRegistersForValue() argument
89 if (OpInfo.ConstraintType == TargetLowering::C_Memory) in getRegistersForValue()
104 if (OpInfo.isMatchingInputConstraint()) in getRegistersForValue()
109 if (OpInfo.ConstraintVT != MVT::Other) in getRegistersForValue()
111 TLI.getNumRegisters(MF.getFunction().getContext(), OpInfo.ConstraintVT); in getRegistersForValue()
132 OpInfo.Regs.push_back(R); in getRegistersForValue()
137 TargetLowering::AsmOperandInfo &OpInfo) { in computeConstraintToUse() argument
138 assert(!OpInfo.Codes.empty() && "Must have at least one constraint"); in computeConstraintToUse()
141 if (OpInfo.Codes.size() == 1) { in computeConstraintToUse()
142 OpInfo.ConstraintCode = OpInfo.Codes[0]; in computeConstraintToUse()
143 OpInfo.ConstraintType = TLI->getConstraintType(OpInfo.ConstraintCode); in computeConstraintToUse()
145 TargetLowering::ConstraintGroup G = TLI->getConstraintPreferences(OpInfo); in computeConstraintToUse()
155 OpInfo.ConstraintCode = G[BestIdx].first; in computeConstraintToUse()
156 OpInfo.ConstraintType = G[BestIdx].second; in computeConstraintToUse()
160 if (OpInfo.ConstraintCode == "X" && OpInfo.CallOperandVal) { in computeConstraintToUse()
164 Value *Val = OpInfo.CallOperandVal; in computeConstraintToUse()
170 if (const char *Repl = TLI->LowerXConstraint(OpInfo.ConstraintVT)) { in computeConstraintToUse()
171 OpInfo.ConstraintCode = Repl; in computeConstraintToUse()
172 OpInfo.ConstraintType = TLI->getConstraintType(OpInfo.ConstraintCode); in computeConstraintToUse()
239 GISelAsmOperandInfo &OpInfo = ConstraintOperands.back(); in lowerInlineAsm() local
242 if (OpInfo.hasArg()) { in lowerInlineAsm()
243 OpInfo.CallOperandVal = const_cast<Value *>(Call.getArgOperand(ArgNo)); in lowerInlineAsm()
245 if (isa<BasicBlock>(OpInfo.CallOperandVal)) { in lowerInlineAsm()
250 Type *OpTy = OpInfo.CallOperandVal->getType(); in lowerInlineAsm()
254 if (OpInfo.isIndirect) { in lowerInlineAsm()
266 OpInfo.ConstraintVT = in lowerInlineAsm()
269 } else if (OpInfo.Type == InlineAsm::isOutput && !OpInfo.isIndirect) { in lowerInlineAsm()
272 OpInfo.ConstraintVT = in lowerInlineAsm()
276 OpInfo.ConstraintVT = in lowerInlineAsm()
281 assert(OpInfo.Type != InlineAsm::isLabel && in lowerInlineAsm()
283 OpInfo.ConstraintVT = MVT::Other; in lowerInlineAsm()
286 if (OpInfo.ConstraintVT == MVT::i64x8) in lowerInlineAsm()
290 computeConstraintToUse(TLI, OpInfo); in lowerInlineAsm()
293 ExtraInfo.update(OpInfo); in lowerInlineAsm()
310 for (auto &OpInfo : ConstraintOperands) { in lowerInlineAsm() local
312 OpInfo.isMatchingInputConstraint() in lowerInlineAsm()
313 ? ConstraintOperands[OpInfo.getMatchedOperand()] in lowerInlineAsm()
314 : OpInfo; in lowerInlineAsm()
317 getRegistersForValue(MF, MIRBuilder, OpInfo, RefOpInfo); in lowerInlineAsm()
319 switch (OpInfo.Type) { in lowerInlineAsm()
321 if (OpInfo.ConstraintType == TargetLowering::C_Memory) { in lowerInlineAsm()
323 TLI->getInlineAsmMemConstraint(OpInfo.ConstraintCode); in lowerInlineAsm()
333 GetOrCreateVRegs(*OpInfo.CallOperandVal); in lowerInlineAsm()
341 assert(OpInfo.ConstraintType == TargetLowering::C_Register || in lowerInlineAsm()
342 OpInfo.ConstraintType == TargetLowering::C_RegisterClass || in lowerInlineAsm()
343 OpInfo.ConstraintType == TargetLowering::C_Other); in lowerInlineAsm()
346 if (OpInfo.Regs.empty()) { in lowerInlineAsm()
354 InlineAsm::Flag Flag(OpInfo.isEarlyClobber in lowerInlineAsm()
357 OpInfo.Regs.size()); in lowerInlineAsm()
358 if (OpInfo.Regs.front().isVirtual()) { in lowerInlineAsm()
363 const TargetRegisterClass *RC = MRI->getRegClass(OpInfo.Regs.front()); in lowerInlineAsm()
369 for (Register Reg : OpInfo.Regs) { in lowerInlineAsm()
372 (OpInfo.isEarlyClobber ? RegState::EarlyClobber : 0)); in lowerInlineAsm()
376 OutputOperands.push_back(OpInfo); in lowerInlineAsm()
382 if (OpInfo.isMatchingInputConstraint()) { in lowerInlineAsm()
383 unsigned DefIdx = OpInfo.getMatchedOperand(); in lowerInlineAsm()
405 ArrayRef<Register> SrcRegs = GetOrCreateVRegs(*OpInfo.CallOperandVal); in lowerInlineAsm()
426 if (OpInfo.ConstraintType == TargetLowering::C_Other && in lowerInlineAsm()
427 OpInfo.isIndirect) { in lowerInlineAsm()
433 if (OpInfo.ConstraintType == TargetLowering::C_Immediate || in lowerInlineAsm()
434 OpInfo.ConstraintType == TargetLowering::C_Other) { in lowerInlineAsm()
437 if (!lowerAsmOperandForConstraint(OpInfo.CallOperandVal, in lowerInlineAsm()
438 OpInfo.ConstraintCode, Ops, in lowerInlineAsm()
441 << OpInfo.ConstraintCode << " yet\n"); in lowerInlineAsm()
456 if (OpInfo.ConstraintType == TargetLowering::C_Memory) { in lowerInlineAsm()
458 if (!OpInfo.isIndirect) { in lowerInlineAsm()
464 assert(OpInfo.isIndirect && "Operand must be indirect to be a mem!"); in lowerInlineAsm()
467 TLI->getInlineAsmMemConstraint(OpInfo.ConstraintCode); in lowerInlineAsm()
472 GetOrCreateVRegs(*OpInfo.CallOperandVal); in lowerInlineAsm()
480 assert((OpInfo.ConstraintType == TargetLowering::C_RegisterClass || in lowerInlineAsm()
481 OpInfo.ConstraintType == TargetLowering::C_Register) && in lowerInlineAsm()
484 if (OpInfo.isIndirect) { in lowerInlineAsm()
487 << OpInfo.ConstraintCode << "'\n"); in lowerInlineAsm()
492 if (OpInfo.Regs.empty()) { in lowerInlineAsm()
499 unsigned NumRegs = OpInfo.Regs.size(); in lowerInlineAsm()
500 ArrayRef<Register> SourceRegs = GetOrCreateVRegs(*OpInfo.CallOperandVal); in lowerInlineAsm()
512 if (OpInfo.Regs.front().isVirtual()) { in lowerInlineAsm()
514 const TargetRegisterClass *RC = MRI->getRegClass(OpInfo.Regs.front()); in lowerInlineAsm()
518 if (!buildAnyextOrCopy(OpInfo.Regs[0], SourceRegs[0], MIRBuilder)) in lowerInlineAsm()
520 Inst.addReg(OpInfo.Regs[0]); in lowerInlineAsm()
526 const unsigned NumRegs = OpInfo.Regs.size(); in lowerInlineAsm()
531 for (Register Reg : OpInfo.Regs) { in lowerInlineAsm()
570 GISelAsmOperandInfo &OpInfo = OutputOperands[i]; in lowerInlineAsm() local
572 if (OpInfo.Regs.empty()) in lowerInlineAsm()
575 switch (OpInfo.ConstraintType) { in lowerInlineAsm()
578 if (OpInfo.Regs.size() > 1) { in lowerInlineAsm()
584 Register SrcReg = OpInfo.Regs[0]; in lowerInlineAsm()