Lines Matching +full:ext +full:- +full:regs
1 //===-- lib/CodeGen/GlobalISel/CallLowering.cpp - Call lowering -----------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
29 #define DEBUG_TYPE "call-lowering"
108 .getFnAttribute("disable-tail-calls") in lowerCall()
113 bool IsVarArg = CB.getFunctionType()->isVarArg(); in lowerCall()
125 // The sret demotion isn't compatible with tail-calls, since the sret in lowerCall()
134 unsigned NumFixedArgs = CB.getFunctionType()->getNumParams(); in lowerCall()
141 // might point to function-local memory), we can't meaningfully tail-call. in lowerCall()
151 const Value *CalleeV = CB.getCalledOperand()->stripPointerCasts(); in lowerCall()
156 CalleeV = cast<ConstantPtrAuth>(CalleeV)->getPointer(); in lowerCall()
161 if (F->hasFnAttribute(Attribute::NonLazyBind)) { in lowerCall()
162 LLT Ty = getLLTForType(*F->getType(), DL); in lowerCall()
170 // callee must be in the same TU and therefore we can direct-call it without in lowerCall()
181 if (!Info.OrigRet.Ty->isVoidTy()) { in lowerCall()
187 Info.OrigRet.Regs[0] = ReturnHintAlignReg; in lowerCall()
195 Info.CFIType = cast<ConstantInt>(Bundle->Inputs[0]); in lowerCall()
196 assert(Info.CFIType->getType()->isIntegerTy(32) && "Invalid CFI type"); in lowerCall()
227 PointerType *PtrTy = dyn_cast<PointerType>(Arg.Ty->getScalarType()); in setArgFlags()
230 Flags.setPointerAddrSpace(PtrTy->getPointerAddressSpace()); in setArgFlags()
237 unsigned ParamIdx = OpIdx - AttributeList::FirstArgIndex; in setArgFlags()
262 MemAlign = Align(getTLI()->getByValTypeAlignment(ElementTy, DL)); in setArgFlags()
265 FuncInfo.getParamStackAlign(OpIdx - AttributeList::FirstArgIndex)) in setArgFlags()
292 LLVMContext &Ctx = OrigArg.Ty->getContext(); in splitToValueTypes()
302 // double] -> double). in splitToValueTypes()
303 SplitArgs.emplace_back(OrigArg.Regs[0], SplitVTs[0].getTypeForEVT(Ctx), in splitToValueTypes()
310 assert(OrigArg.Regs.size() == SplitVTs.size() && "Regs / types mismatch"); in splitToValueTypes()
312 bool NeedsRegBlock = TLI->functionArgumentNeedsConsecutiveRegisters( in splitToValueTypes()
316 SplitArgs.emplace_back(OrigArg.Regs[i], SplitTy, OrigArg.OrigArgIndex, in splitToValueTypes()
350 // promoted to a vector e.g. s8 -> v4s8 -> s8 in mergeVectorRegsToResultRegs()
371 /// value registers of type \p LLTy, and \p Regs contains the legalized pieces
374 ArrayRef<Register> Regs, LLT LLTy, LLT PartLLT, in buildCopyFromRegs() argument
381 assert(OrigRegs[0] == Regs[0]); in buildCopyFromRegs()
386 Regs.size() == 1) { in buildCopyFromRegs()
387 B.buildBitcast(OrigRegs[0], Regs[0]); in buildCopyFromRegs()
397 OrigRegs.size() == 1 && Regs.size() == 1) { in buildCopyFromRegs()
398 Register SrcReg = Regs[0]; in buildCopyFromRegs()
426 unsigned SrcSize = PartLLT.getSizeInBits().getFixedValue() * Regs.size(); in buildCopyFromRegs()
428 B.buildMergeValues(OrigRegs[0], Regs); in buildCopyFromRegs()
430 auto Widened = B.buildMergeLikeInstr(LLT::scalar(SrcSize), Regs); in buildCopyFromRegs()
439 SmallVector<Register> CastRegs(Regs.begin(), Regs.end()); in buildCopyFromRegs()
447 Regs.size() == 1) { in buildCopyFromRegs()
450 CastRegs[0] = B.buildBitcast(NewTy, Regs[0]).getReg(0); in buildCopyFromRegs()
485 for (Register Reg : Regs) in buildCopyFromRegs()
489 B.buildBuildVector(OrigRegs[0], Regs); in buildCopyFromRegs()
491 // Deal with vector with 64-bit elements decomposed to 32-bit in buildCopyFromRegs()
492 // registers. Need to create intermediate 64-bit elements. in buildCopyFromRegs()
500 B.buildMergeLikeInstr(ExtendedPartTy, Regs.take_front(PartsPerElt)); in buildCopyFromRegs()
506 Regs = Regs.drop_front(PartsPerElt); in buildCopyFromRegs()
517 if (NumElts == Regs.size()) in buildCopyFromRegs()
518 BuildVec = B.buildBuildVector(BVType, Regs).getReg(0); in buildCopyFromRegs()
521 // e.g. we have a <4 x s16> but 2 x s32 in regs. in buildCopyFromRegs()
522 assert(NumElts > Regs.size()); in buildCopyFromRegs()
523 LLT SrcEltTy = MRI.getType(Regs[0]); in buildCopyFromRegs()
534 BVRegs.reserve(Regs.size() * EltPerReg); in buildCopyFromRegs()
535 for (Register R : Regs) { in buildCopyFromRegs()
544 assert((BVRegs.size() - NumElts) < EltPerReg); in buildCopyFromRegs()
586 // A coercion like: v2f32 -> v4f32 or nxv2f32 -> nxv4f32 in buildCopyToRegs()
605 auto Ext = B.buildAnyExt(ExtTy, SrcReg); in buildCopyToRegs() local
606 B.buildUnmerge(DstRegs, Ext); in buildCopyToRegs()
684 MVT NewVT = TLI->getRegisterTypeForCallingConv(Ctx, CallConv, CurVT); in determineAssignments()
686 // If we need to split the type over multiple regs, check it's a scenario in determineAssignments()
689 TLI->getNumRegistersForCallingConv(Ctx, CallConv, CurVT); in determineAssignments()
702 // multiple regs, so we have to record this information for later. in determineAssignments()
708 // We're handling an incoming arg which is split over multiple regs. in determineAssignments()
719 if (Part == NumParts - 1) in determineAssignments()
775 j += (NumArgRegs - 1); in handleAssignments()
792 // Expected to be multiple regs for a single incoming arg. in handleAssignments()
793 // There should be Regs.size() ArgLocs per argument. in handleAssignments()
798 Args[i].OrigRegs.assign(Args[i].Regs.begin(), Args[i].Regs.end()); in handleAssignments()
803 Args[i].Regs.resize(NumParts); in handleAssignments()
809 Args[i].Regs[0] = MRI.createGenericVirtualRegister(PointerTy); in handleAssignments()
815 Args[i].Regs[Part] = MRI.createGenericVirtualRegister(NewLLT); in handleAssignments()
819 assert((j + (NumParts - 1)) < ArgLocs.size() && in handleAssignments()
820 "Too many regs for number of args"); in handleAssignments()
826 buildCopyToRegs(MIRBuilder, Args[i].Regs, Args[i].OrigRegs[0], OrigTy, in handleAssignments()
831 bool BigEndianPartOrdering = TLI->hasBigEndianPartOrdering(OrigVT, DL); in handleAssignments()
836 Register ArgReg = Args[i].Regs[Part]; in handleAssignments()
837 // There should be Regs.size() ArgLocs per argument. in handleAssignments()
838 unsigned Idx = BigEndianPartOrdering ? NumParts - 1 - Part : Part; in handleAssignments()
900 assert(Args[i].Regs.size() == 1 && "didn't expect split byval pointer"); in handleAssignments()
907 MIRBuilder.buildCopy(Args[i].Regs[0], StackAddr); in handleAssignments()
933 Handler.copyArgumentMemory(Args[i], StackAddr, Args[i].Regs[0], in handleAssignments()
961 MIRBuilder.buildLoad(Args[i].OrigRegs[0], Args[i].Regs[0], MPO, in handleAssignments()
971 // Now that all pieces have been assigned, re-pack the register typed values in handleAssignments()
978 buildCopyFromRegs(MIRBuilder, Args[i].OrigRegs, Args[i].Regs, OrigTy, in handleAssignments()
982 j += NumParts - 1; in handleAssignments()
1006 PointerType::get(RetTy->getContext(), DL.getAllocaAddrSpace()); in insertSRetLoads()
1037 LLT OffsetLLTy = getLLTForType(*DL.getIndexType(RetTy->getPointerTo(AS)), DL); in insertSRetStores()
1066 ArgInfo DemoteArg(DemoteReg, ValueVTs[0].getTypeForEVT(PtrTy->getContext()), in insertSRetIncomingArgument()
1110 LLVMContext &Context = RetTy->getContext(); in getReturnInfo()
1119 TLI->getNumRegistersForCallingConv(Context, CallConv, VT); in getReturnInfo()
1120 MVT RegVT = TLI->getRegisterTypeForCallingConv(Context, CallConv, VT); in getReturnInfo()
1152 // Only look at callee-saved registers. in parametersInCSRMatch()
1158 << "... Call has an argument passed in a callee-saved register.\n"); in parametersInCSRMatch()
1163 if (OutInfo.Regs.size() > 1) { in parametersInCSRMatch()
1172 MachineInstr *RegDef = getDefIgnoringCopies(OutInfo.Regs[0], MRI); in parametersInCSRMatch()
1173 if (!RegDef || RegDef->getOpcode() != TargetOpcode::COPY) { in parametersInCSRMatch()
1181 Register CopyRHS = RegDef->getOperand(1).getReg(); in parametersInCSRMatch()
1183 LLVM_DEBUG(dbgs() << "... Callee-saved register was not copied into " in parametersInCSRMatch()
1309 // The x32 ABI wants to zero extend 32-bit pointers to 64-bit registers, so in extendRegister()
1321 // nop in big-endian situations. in extendRegister()