1 //===- DetectDeadLanes.cpp - SubRegister Lane Usage Analysis --*- C++ -*---===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
21 ///    %2 = REG_SEQUENCE %0, sub0, %1, sub1
22 ///    %3 = EXTRACT_SUBREG %2, sub1
26 //===----------------------------------------------------------------------===//
39 #define DEBUG_TYPE "detect-dead-lanes"
42                                    const TargetRegisterInfo *TRI)  in DeadLaneDetector()  argument
43     : MRI(MRI), TRI(TRI) {  in DeadLaneDetector()
44   unsigned NumVirtRegs = MRI->getNumVirtRegs();  in DeadLaneDetector()
51 /// We call this a COPY-like instruction.
79   const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo();  in isCrossCopy()  local
83     if (MO.getOperandNo() == 2)  in isCrossCopy()
92     unsigned SubReg = MI.getOperand(2).getImm();  in isCrossCopy()
93     SrcSubIdx = TRI.composeSubRegIndices(SubReg, SrcSubIdx);  in isCrossCopy()
99     return !TRI.getCommonSuperRegClass(SrcRC, SrcSubIdx, DstRC, DstSubIdx, PreA,  in isCrossCopy()
102     return !TRI.getMatchingSuperRegClass(SrcRC, DstRC, SrcSubIdx);  in isCrossCopy()
104     return !TRI.getMatchingSuperRegClass(DstRC, SrcRC, DstSubIdx);  in isCrossCopy()
105   return !TRI.getCommonSubClass(SrcRC, DstRC);  in isCrossCopy()
118     UsedLanes = TRI->composeSubRegIndexLaneMask(MOSubReg, UsedLanes);  in addUsedLanesOnOperand()
119   UsedLanes &= MRI->getMaxLaneMaskForVReg(MOReg);  in addUsedLanesOnOperand()
157     assert(OpNum % 2 == 1);  in transferUsedLanes()
159     return TRI->reverseComposeSubRegIndexLaneMask(SubIdx, UsedLanes);  in transferUsedLanes()
164         TRI->reverseComposeSubRegIndexLaneMask(SubIdx, UsedLanes);  in transferUsedLanes()
165     if (OpNum == 2)  in transferUsedLanes()
170     const TargetRegisterClass *RC = MRI->getRegClass(DefReg);  in transferUsedLanes()
172     if (RC->CoveredBySubRegs)  in transferUsedLanes()
173       MO1UsedLanes = UsedLanes & ~TRI->getSubRegIndexLaneMask(SubIdx);  in transferUsedLanes()
175       MO1UsedLanes = RC->LaneMask;  in transferUsedLanes()
182     unsigned SubIdx = MI.getOperand(2).getImm();  in transferUsedLanes()
183     return TRI->composeSubRegIndexLaneMask(SubIdx, UsedLanes);  in transferUsedLanes()
185   default:  in transferUsedLanes()
186     llvm_unreachable("function must be called with COPY-like instruction");  in transferUsedLanes()
194   // Check whether the operand writes a vreg and is part of a COPY-like  in transferDefinedLanesStep()
213       TRI->reverseComposeSubRegIndexLaneMask(Use.getSubReg(), DefinedLanes);  in transferDefinedLanesStep()
233     DefinedLanes = TRI->composeSubRegIndexLaneMask(SubIdx, DefinedLanes);  in transferDefinedLanes()
234     DefinedLanes &= TRI->getSubRegIndexLaneMask(SubIdx);  in transferDefinedLanes()
239     if (OpNum == 2) {  in transferDefinedLanes()
240       DefinedLanes = TRI->composeSubRegIndexLaneMask(SubIdx, DefinedLanes);  in transferDefinedLanes()
241       DefinedLanes &= TRI->getSubRegIndexLaneMask(SubIdx);  in transferDefinedLanes()
244       // Ignore lanes defined by operand 2.  in transferDefinedLanes()
245       DefinedLanes &= ~TRI->getSubRegIndexLaneMask(SubIdx);  in transferDefinedLanes()
250     unsigned SubIdx = MI.getOperand(2).getImm();  in transferDefinedLanes()
252     DefinedLanes = TRI->reverseComposeSubRegIndexLaneMask(SubIdx, DefinedLanes);  in transferDefinedLanes()
258   default:  in transferDefinedLanes()
259     llvm_unreachable("function must be called with COPY-like instruction");  in transferDefinedLanes()
264   DefinedLanes &= MRI->getMaxLaneMaskForVReg(Def.getReg());  in transferDefinedLanes()
269   // Live-In or unused registers have no definition but are considered fully  in determineInitialDefinedLanes()
271   if (!MRI->hasOneDef(Reg))  in determineInitialDefinedLanes()
274   const MachineOperand &Def = *MRI->def_begin(Reg);  in determineInitialDefinedLanes()
289     const TargetRegisterClass *DefRC = MRI->getRegClass(Reg);  in determineInitialDefinedLanes()
307         if (MRI->hasOneDef(MOReg)) {  in determineInitialDefinedLanes()
308           const MachineOperand &MODef = *MRI->def_begin(MOReg);  in determineInitialDefinedLanes()
310           // Bits from copy-like operations will be added later.  in determineInitialDefinedLanes()
315         MODefinedLanes = MRI->getMaxLaneMaskForVReg(MOReg);  in determineInitialDefinedLanes()
316         MODefinedLanes = TRI->reverseComposeSubRegIndexLaneMask(  in determineInitialDefinedLanes()
330   return MRI->getMaxLaneMaskForVReg(Reg);  in determineInitialDefinedLanes()
335   for (const MachineOperand &MO : MRI->use_nodbg_operands(Reg)) {  in determineInitialUsedLanes()
348       // The used lanes of COPY-like instruction operands are determined by the  in determineInitialUsedLanes()
354           const TargetRegisterClass *DstRC = MRI->getRegClass(DefReg);  in determineInitialUsedLanes()
367       return MRI->getMaxLaneMaskForVReg(Reg);  in determineInitialUsedLanes()
369     UsedLanes |= TRI->getSubRegIndexLaneMask(SubReg);  in determineInitialUsedLanes()
407   const TargetRegisterInfo *TRI = nullptr;  member in __anon3e1788ee0111::DetectDeadLanes
420   LaneBitmask Mask = TRI->getSubRegIndexLaneMask(SubReg);  in isUndefRegAtInput()
447     const TargetRegisterClass *DstRC = MRI->getRegClass(DefReg);  in isUndefInput()
455   unsigned NumVirtRegs = MRI->getNumVirtRegs();  in computeSubRegisterLaneBitInfo()
474     MachineOperand &Def = *MRI->def_begin(Reg);  in computeSubRegisterLaneBitInfo()
478     for (const MachineOperand &MO : MRI->use_nodbg_operands(Reg))  in computeSubRegisterLaneBitInfo()
547   if (!MRI->subRegLivenessEnabled()) {  in runOnMachineFunction()
552   TRI = MRI->getTargetRegisterInfo();  in runOnMachineFunction()
554   DeadLaneDetector DLD(MRI, TRI);  in runOnMachineFunction()