1028     const TargetRegisterClass *RC = RegClassForVT[VT.SimpleTy];
1049     const TargetRegisterClass *RC = RepRegClassForVT[VT.SimpleTy];  in getRepRegClassFor()
1056     return RepRegClassCostForVT[VT.SimpleTy];  in getRepRegClassCostFor()
1079            (unsigned)VT.getSimpleVT().SimpleTy < std::size(RegClassForVT));  in isTypeLegal()
1080     return VT.isSimple() && RegClassForVT[VT.getSimpleVT().SimpleTy] != nullptr;  in isTypeLegal()
1095       return ValueTypeActions[VT.SimpleTy];  in getTypeAction()
1099       ValueTypeActions[VT.SimpleTy] = Action;  in setTypeAction()
1261     return OpActions[(unsigned)VT.getSimpleVT().SimpleTy][Op];  in getOperationAction()
1442     unsigned ValI = (unsigned) ValVT.getSimpleVT().SimpleTy;  in getLoadExtAction()
1443     unsigned MemI = (unsigned) MemVT.getSimpleVT().SimpleTy;  in getLoadExtAction()
1466     unsigned ValI = (unsigned)ValVT.getSimpleVT().SimpleTy;  in getAtomicLoadExtAction()
1467     unsigned MemI = (unsigned)MemVT.getSimpleVT().SimpleTy;  in getAtomicLoadExtAction()
1489     unsigned ValI = (unsigned) ValVT.getSimpleVT().SimpleTy;  in getTruncStoreAction()
1490     unsigned MemI = (unsigned) MemVT.getSimpleVT().SimpleTy;  in getTruncStoreAction()
1602            ((unsigned)VT.SimpleTy >> 3) < std::size(CondCodeActions[0]) &&  in getCondCodeAction()
1605     uint32_t Shift = 4 * (VT.SimpleTy & 0x7);  in getCondCodeAction()
1606     uint32_t Value = CondCodeActions[CC][VT.SimpleTy >> 3];  in getCondCodeAction()
1633       PromoteToType.find(std::make_pair(Op, VT.SimpleTy));  in getTypeToPromoteTo()
1642       NVT = (MVT::SimpleValueType)(NVT.SimpleTy+1);  in getTypeToPromoteTo()
1712     assert((unsigned)VT.SimpleTy < std::size(RegisterTypeForVT));  in getRegisterType()
1713     return RegisterTypeForVT[VT.SimpleTy];  in getRegisterType()
1749       assert((unsigned)VT.getSimpleVT().SimpleTy <
1751       return NumRegistersForVT[VT.getSimpleVT().SimpleTy];
2520     assert((unsigned)VT.SimpleTy < std::size(RegClassForVT));  in addRegisterClass()
2521     RegClassForVT[VT.SimpleTy] = RC;  in addRegisterClass()
2538     OpActions[(unsigned)VT.SimpleTy][Op] = Action;  in setOperationAction()
2559     LoadExtActions[ValVT.SimpleTy][MemVT.SimpleTy] &= ~((uint16_t)0xF << Shift);  in setLoadExtAction()
2560     LoadExtActions[ValVT.SimpleTy][MemVT.SimpleTy] |= (uint16_t)Action << Shift;  in setLoadExtAction()
2581     AtomicLoadExtActions[ValVT.SimpleTy][MemVT.SimpleTy] &=  in setAtomicLoadExtAction()
2583     AtomicLoadExtActions[ValVT.SimpleTy][MemVT.SimpleTy] |=  in setAtomicLoadExtAction()
2601     TruncStoreActions[(unsigned)ValVT.SimpleTy][MemVT.SimpleTy] = Action;  in setTruncStoreAction()
2669       uint32_t Shift = 4 * (VT.SimpleTy & 0x7);  in setCondCodeAction()
2670       CondCodeActions[CC][VT.SimpleTy >> 3] &= ~((uint32_t)0xF << Shift);  in setCondCodeAction()
2671       CondCodeActions[CC][VT.SimpleTy >> 3] |= (uint32_t)Action << Shift;  in setCondCodeAction()
2685     PromoteToType[std::make_pair(Opc, OrigVT.SimpleTy)] = DestVT.SimpleTy;  in AddPromotedToType()
3654     unsigned Ty = (unsigned)VT.SimpleTy;  in setIndexedModeAction()
3663     unsigned Ty = (unsigned)VT.SimpleTy;  in getIndexedModeAction()