Lines Matching +full:cycle +full:-
1 //===- ModuloSchedule.h - Software pipeline schedule expansion ------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
18 // A schedule is, for every instruction in a block, a Cycle and a Stage. Note
19 // that we only support single-block loops, so "block" and "loop" can be used
22 // The Cycle of an instruction defines a partial order of the instructions in
23 // the remapped loop. Instructions within a cycle must not consume the output
24 // of any instruction in the same cycle. Cycle information is assumed to have
26 // lock-step (for example in a VLIW ISA).
52 // an arbitrary schedule containing loop-carried values are complex.
54 // Note that these examples only mention the steady-state kernel of the
58 //===----------------------------------------------------------------------===//
78 /// Represents a schedule for a single-block loop. For every instruction we
79 /// maintain a Cycle and Stage.
85 /// The instructions to be generated, in total order. Cycle provides a partial
90 /// The cycle for each instruction.
91 DenseMap<MachineInstr *, int> Cycle; variable
103 /// \arg Cycle Cycle index for all instructions in ScheduledInstrs. Cycle does
105 /// Cycle.
109 DenseMap<MachineInstr *, int> Cycle, in ModuloSchedule() argument
111 : Loop(Loop), ScheduledInstrs(ScheduledInstrs), Cycle(std::move(Cycle)), in ModuloSchedule()
114 for (auto &KV : this->Stage) in ModuloSchedule()
119 /// Return the single-block loop being scheduled.
126 /// Return the first cycle in the schedule, which is the cycle index of the
128 int getFirstCycle() { return Cycle[ScheduledInstrs.front()]; } in getFirstCycle()
130 /// Return the final cycle in the schedule, which is the cycle index of the
132 int getFinalCycle() { return Cycle[ScheduledInstrs.back()]; } in getFinalCycle()
134 /// Return the stage that MI is scheduled in, or -1.
137 return I == Stage.end() ? -1 : I->second; in getStage()
140 /// Return the cycle that MI is scheduled at, or -1.
142 auto I = Cycle.find(MI); in getCycle()
143 return I == Cycle.end() ? -1 : I->second; in getCycle()
159 /// The ModuloScheduleExpander takes a ModuloSchedule and expands it in-place,
240 if ((int)CurStage > Schedule.getNumStages() - 1 && Stages.first == 0 && in getStagesForReg()
256 return Stages.first - 1; in getStagesForPhi()
304 /// The original loop block that gets rewritten in-place.
328 /// Illegal phis that need to be deleted once we re-link stages.
332 /// steady-state.
352 /// (LiveStages[MI->getParent()] == false).
356 /// Create a poor-man's LCSSA by cloning only the PHIs from the kernel block
445 /// Expander that simply annotates each scheduled instruction with a post-instr
448 /// The post-instr symbol is a way of annotating an instruction that can be
450 /// MYINST %0, post-instr-symbol <mcsymbol Stage-1_Cycle-5>