Lines Matching +full:non +full:- +full:sticky

1 //===-- addsf3.S - Adds two single precision floating pointer numbers-----===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
10 // addition with the IEEE-754 default rounding (to nearest, ties to even)
13 //===----------------------------------------------------------------------===//
55   // Get the significands and shift them to give us round, guard and sticky.
56   lsls r4, r0, #(typeWidth - significandBits)
57   lsrs r4, r4, #(typeWidth - significandBits - 3) // aSignificand << 3
58   lsls r5, r1, #(typeWidth - significandBits)
59   lsrs r5, r5, #(typeWidth - significandBits - 3) // bSignificand << 3
82   // right shift bSignificand by (align - 1) bits.
89   // Set sticky bits of b: sticky = bSignificand << (typeWidth - align).
98   // bSignificand = bSignificand >> align | sticky;
102   movs r5, #1 //  sticky; b is known to be non-zero.
122   // If the addition carried up, we need to right-shift the result and
126   ands r7, r6 // sticky = aSignificand & 1;
130   // If we have overflowed the type, return +/- infinity.
136   lsrs r0, #(typeWidth - 1)
137   lsls r0, #(typeWidth - 1) // Get Sign.
141   lsls r4, #(typeWidth - significandBits - 3)
142   lsrs r4, #(typeWidth - significandBits)
168   subs r4, r4, r5 // aSignificand -= bSignificand;
173   // If partial cancellation occured, we need to left-shift the result
183   // shift = rep_clz(aSignificand) - rep_clz(implicitBit << 3);
184   subs r5, r5, #(typeWidth - significandBits - 3 - 1)
185   // aSignificand <<= shift; aExponent -= shift;
192   subs r6, r6, r2 // 1 - aExponent;
197   lsls r7, r3  // stickyBit = (bool)(aSignificant << (typeWidth - align))
228   lsls r6, r6, #(typeWidth - 1) // get sign mask.
229   cmp r1, r6 // if they only differ on sign bit, it's -INF + INF
248   ands r0, r1 // +0 + -0 = +0
261   lsls r1, r1, #(significandBits -1) // r1 is quiet bit.