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1 /*===---- tmmintrin.h - SSSE3 intrinsics -----------------------------------===
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 *===-----------------------------------------------------------------------===
14 #error "This header is only meant to be used on x86 and x64 architecture"
22 __target__("ssse3,no-evex512"), __min_vector_width__(64)))
25 __target__("mmx,ssse3,no-evex512"), \
28 /// Computes the absolute value of each of the packed 8-bit signed
29 /// integers in the source operand and stores the 8-bit unsigned integer
34 /// This intrinsic corresponds to the \c PABSB instruction.
37 /// A 64-bit vector of [8 x i8].
38 /// \returns A 64-bit integer vector containing the absolute values of the
46 /// Computes the absolute value of each of the packed 8-bit signed
47 /// integers in the source operand and stores the 8-bit unsigned integer
52 /// This intrinsic corresponds to the \c VPABSB instruction.
55 /// A 128-bit vector of [16 x i8].
56 /// \returns A 128-bit integer vector containing the absolute values of the
64 /// Computes the absolute value of each of the packed 16-bit signed
65 /// integers in the source operand and stores the 16-bit unsigned integer
70 /// This intrinsic corresponds to the \c PABSW instruction.
73 /// A 64-bit vector of [4 x i16].
74 /// \returns A 64-bit integer vector containing the absolute values of the
82 /// Computes the absolute value of each of the packed 16-bit signed
83 /// integers in the source operand and stores the 16-bit unsigned integer
88 /// This intrinsic corresponds to the \c VPABSW instruction.
91 /// A 128-bit vector of [8 x i16].
92 /// \returns A 128-bit integer vector containing the absolute values of the
100 /// Computes the absolute value of each of the packed 32-bit signed
101 /// integers in the source operand and stores the 32-bit unsigned integer
106 /// This intrinsic corresponds to the \c PABSD instruction.
109 /// A 64-bit vector of [2 x i32].
110 /// \returns A 64-bit integer vector containing the absolute values of the
118 /// Computes the absolute value of each of the packed 32-bit signed
119 /// integers in the source operand and stores the 32-bit unsigned integer
124 /// This intrinsic corresponds to the \c VPABSD instruction.
127 /// A 128-bit vector of [4 x i32].
128 /// \returns A 128-bit integer vector containing the absolute values of the
136 /// Concatenates the two 128-bit integer vector operands, and
137 /// right-shifts the result by the number of bytes specified in the immediate
146 /// This intrinsic corresponds to the \c PALIGNR instruction.
149 /// A 128-bit vector of [16 x i8] containing one of the source operands.
151 /// A 128-bit vector of [16 x i8] containing one of the source operands.
153 /// An immediate operand specifying how many bytes to right-shift the result.
154 /// \returns A 128-bit integer vector containing the concatenated right-shifted
160 /// Concatenates the two 64-bit integer vector operands, and right-shifts
169 /// This intrinsic corresponds to the \c PALIGNR instruction.
172 /// A 64-bit vector of [8 x i8] containing one of the source operands.
174 /// A 64-bit vector of [8 x i8] containing one of the source operands.
176 /// An immediate operand specifying how many bytes to right-shift the result.
177 /// \returns A 64-bit integer vector containing the concatenated right-shifted
183 /// 128-bit vectors of [8 x i16].
187 /// This intrinsic corresponds to the \c VPHADDW instruction.
190 /// A 128-bit vector of [8 x i16] containing one of the source operands. The
194 /// A 128-bit vector of [8 x i16] containing one of the source operands. The
197 /// \returns A 128-bit vector of [8 x i16] containing the horizontal sums of
206 /// 128-bit vectors of [4 x i32].
210 /// This intrinsic corresponds to the \c VPHADDD instruction.
213 /// A 128-bit vector of [4 x i32] containing one of the source operands. The
217 /// A 128-bit vector of [4 x i32] containing one of the source operands. The
220 /// \returns A 128-bit vector of [4 x i32] containing the horizontal sums of
229 /// 64-bit vectors of [4 x i16].
233 /// This intrinsic corresponds to the \c PHADDW instruction.
236 /// A 64-bit vector of [4 x i16] containing one of the source operands. The
240 /// A 64-bit vector of [4 x i16] containing one of the source operands. The
243 /// \returns A 64-bit vector of [4 x i16] containing the horizontal sums of both
252 /// 64-bit vectors of [2 x i32].
256 /// This intrinsic corresponds to the \c PHADDD instruction.
259 /// A 64-bit vector of [2 x i32] containing one of the source operands. The
263 /// A 64-bit vector of [2 x i32] containing one of the source operands. The
266 /// \returns A 64-bit vector of [2 x i32] containing the horizontal sums of both
275 /// in two packed 128-bit vectors of [8 x i16].
277 /// Positive sums greater than 0x7FFF are saturated to 0x7FFF. Negative sums
278 /// less than 0x8000 are saturated to 0x8000.
282 /// This intrinsic corresponds to the \c VPHADDSW instruction.
285 /// A 128-bit vector of [8 x i16] containing one of the source operands. The
289 /// A 128-bit vector of [8 x i16] containing one of the source operands. The
292 /// \returns A 128-bit vector of [8 x i16] containing the horizontal saturated
301 /// in two packed 64-bit vectors of [4 x i16].
303 /// Positive sums greater than 0x7FFF are saturated to 0x7FFF. Negative sums
304 /// less than 0x8000 are saturated to 0x8000.
308 /// This intrinsic corresponds to the \c PHADDSW instruction.
311 /// A 64-bit vector of [4 x i16] containing one of the source operands. The
315 /// A 64-bit vector of [4 x i16] containing one of the source operands. The
318 /// \returns A 64-bit vector of [4 x i16] containing the horizontal saturated
327 /// packed 128-bit vectors of [8 x i16].
331 /// This intrinsic corresponds to the \c VPHSUBW instruction.
334 /// A 128-bit vector of [8 x i16] containing one of the source operands. The
338 /// A 128-bit vector of [8 x i16] containing one of the source operands. The
341 /// \returns A 128-bit vector of [8 x i16] containing the horizontal differences
350 /// packed 128-bit vectors of [4 x i32].
354 /// This intrinsic corresponds to the \c VPHSUBD instruction.
357 /// A 128-bit vector of [4 x i32] containing one of the source operands. The
361 /// A 128-bit vector of [4 x i32] containing one of the source operands. The
364 /// \returns A 128-bit vector of [4 x i32] containing the horizontal differences
373 /// packed 64-bit vectors of [4 x i16].
377 /// This intrinsic corresponds to the \c PHSUBW instruction.
380 /// A 64-bit vector of [4 x i16] containing one of the source operands. The
384 /// A 64-bit vector of [4 x i16] containing one of the source operands. The
387 /// \returns A 64-bit vector of [4 x i16] containing the horizontal differences
396 /// packed 64-bit vectors of [2 x i32].
400 /// This intrinsic corresponds to the \c PHSUBD instruction.
403 /// A 64-bit vector of [2 x i32] containing one of the source operands. The
407 /// A 64-bit vector of [2 x i32] containing one of the source operands. The
410 /// \returns A 64-bit vector of [2 x i32] containing the horizontal differences
419 /// contained in two packed 128-bit vectors of [8 x i16].
421 /// Positive differences greater than 0x7FFF are saturated to 0x7FFF.
422 /// Negative differences less than 0x8000 are saturated to 0x8000.
426 /// This intrinsic corresponds to the \c VPHSUBSW instruction.
429 /// A 128-bit vector of [8 x i16] containing one of the source operands. The
433 /// A 128-bit vector of [8 x i16] containing one of the source operands. The
436 /// \returns A 128-bit vector of [8 x i16] containing the horizontal saturated
445 /// contained in two packed 64-bit vectors of [4 x i16].
447 /// Positive differences greater than 0x7FFF are saturated to 0x7FFF.
448 /// Negative differences less than 0x8000 are saturated to 0x8000.
452 /// This intrinsic corresponds to the \c PHSUBSW instruction.
455 /// A 64-bit vector of [4 x i16] containing one of the source operands. The
459 /// A 64-bit vector of [4 x i16] containing one of the source operands. The
462 /// \returns A 64-bit vector of [4 x i16] containing the horizontal saturated
470 /// Multiplies corresponding pairs of packed 8-bit unsigned integer
471 /// values contained in the first source operand and packed 8-bit signed
473 /// contiguous products with signed saturation, and writes the 16-bit sums to
477 /// both operands are multiplied, and the sum of both results is written to
482 /// This intrinsic corresponds to the \c VPMADDUBSW instruction.
485 /// A 128-bit integer vector containing the first source operand.
487 /// A 128-bit integer vector containing the second source operand.
488 /// \returns A 128-bit integer vector containing the sums of products of both
504 /// Multiplies corresponding pairs of packed 8-bit unsigned integer
505 /// values contained in the first source operand and packed 8-bit signed
507 /// contiguous products with signed saturation, and writes the 16-bit sums to
511 /// both operands are multiplied, and the sum of both results is written to
516 /// This intrinsic corresponds to the \c PMADDUBSW instruction.
519 /// A 64-bit integer vector containing the first source operand.
521 /// A 64-bit integer vector containing the second source operand.
522 /// \returns A 64-bit integer vector containing the sums of products of both
534 /// Multiplies packed 16-bit signed integer values, truncates the 32-bit
535 /// products to the 18 most significant bits by right-shifting, rounds the
536 /// truncated value by adding 1, and writes bits [16:1] to the destination.
540 /// This intrinsic corresponds to the \c VPMULHRSW instruction.
543 /// A 128-bit vector of [8 x i16] containing one of the source operands.
545 /// A 128-bit vector of [8 x i16] containing one of the source operands.
546 /// \returns A 128-bit vector of [8 x i16] containing the rounded and scaled
554 /// Multiplies packed 16-bit signed integer values, truncates the 32-bit
555 /// products to the 18 most significant bits by right-shifting, rounds the
556 /// truncated value by adding 1, and writes bits [16:1] to the destination.
560 /// This intrinsic corresponds to the \c PMULHRSW instruction.
563 /// A 64-bit vector of [4 x i16] containing one of the source operands.
565 /// A 64-bit vector of [4 x i16] containing one of the source operands.
566 /// \returns A 64-bit vector of [4 x i16] containing the rounded and scaled
574 /// Copies the 8-bit integers from a 128-bit integer vector to the
575 /// destination or clears 8-bit values in the destination, as specified by
580 /// This intrinsic corresponds to the \c VPSHUFB instruction.
583 /// A 128-bit integer vector containing the values to be copied.
585 /// A 128-bit integer vector containing control bytes corresponding to
589 /// 0: Copy the selected source byte to the corresponding byte in the
592 /// Bits [3:0] select the source byte to be copied.
593 /// \returns A 128-bit integer vector containing the copied or cleared values.
600 /// Copies the 8-bit integers from a 64-bit integer vector to the
601 /// destination or clears 8-bit values in the destination, as specified by
606 /// This intrinsic corresponds to the \c PSHUFB instruction.
609 /// A 64-bit integer vector containing the values to be copied.
611 /// A 64-bit integer vector containing control bytes corresponding to
615 /// 0: Copy the selected source byte to the corresponding byte in the
617 /// Bits [3:0] select the source byte to be copied.
618 /// \returns A 64-bit integer vector containing the copied or cleared values.
625 /// For each 8-bit integer in the first source operand, perform one of
630 /// value to the destination. If the byte in the second source is positive,
631 /// copy the corresponding byte from the first source to the destination. If
637 /// This intrinsic corresponds to the \c VPSIGNB instruction.
640 /// A 128-bit integer vector containing the values to be copied.
642 /// A 128-bit integer vector containing control bytes corresponding to
644 /// \returns A 128-bit integer vector containing the resultant values.
651 /// For each 16-bit integer in the first source operand, perform one of
656 /// value to the destination. If the word in the second source is positive,
657 /// copy the corresponding word from the first source to the destination. If
663 /// This intrinsic corresponds to the \c VPSIGNW instruction.
666 /// A 128-bit integer vector containing the values to be copied.
668 /// A 128-bit integer vector containing control words corresponding to
670 /// \returns A 128-bit integer vector containing the resultant values.
677 /// For each 32-bit integer in the first source operand, perform one of
682 /// value to the destination. If the doubleword in the second source is
683 /// positive, copy the corresponding word from the first source to the
689 /// This intrinsic corresponds to the \c VPSIGND instruction.
692 /// A 128-bit integer vector containing the values to be copied.
694 /// A 128-bit integer vector containing control doublewords corresponding to
696 /// \returns A 128-bit integer vector containing the resultant values.
703 /// For each 8-bit integer in the first source operand, perform one of
708 /// value to the destination. If the byte in the second source is positive,
709 /// copy the corresponding byte from the first source to the destination. If
715 /// This intrinsic corresponds to the \c PSIGNB instruction.
718 /// A 64-bit integer vector containing the values to be copied.
720 /// A 64-bit integer vector containing control bytes corresponding to
722 /// \returns A 64-bit integer vector containing the resultant values.
729 /// For each 16-bit integer in the first source operand, perform one of
734 /// value to the destination. If the word in the second source is positive,
735 /// copy the corresponding word from the first source to the destination. If
741 /// This intrinsic corresponds to the \c PSIGNW instruction.
744 /// A 64-bit integer vector containing the values to be copied.
746 /// A 64-bit integer vector containing control words corresponding to
748 /// \returns A 64-bit integer vector containing the resultant values.
755 /// For each 32-bit integer in the first source operand, perform one of
760 /// write that value to the destination. If the doubleword in the second
762 /// source to the destination. If the doubleword in the second source is
767 /// This intrinsic corresponds to the \c PSIGND instruction.
770 /// A 64-bit integer vector containing the values to be copied.
772 /// A 64-bit integer vector containing two control doublewords corresponding
773 /// to positions in the destination.
774 /// \returns A 64-bit integer vector containing the resultant values.