Lines Matching +full:128 +full:b

19                  __min_vector_width__(128)))
34 ///    A 128-bit vector of [4 x int].
36 ///    A 128-bit vector of [4 x int].
38 ///    A 128-bit vector of [4 x int].
40 ///    A 128-bit vector of [4 x int].
70 /// dst[MAX:128] := 0
92 ///    A 128-bit vector of [4 x int].
94 ///    A 128-bit vector of [4 x int].
96 ///    A 128-bit vector of [4 x int].
98 ///    A 128-bit vector of [4 x int].
127 /// dst[MAX:128] := 0
137 ///    (C, D, G, H) from \a __A, an initial SM3 states (A, B, E, F)
140 ///    variables from previous state. The updated SM3 state (A, B, E, F) is
156 ///    A 128-bit vector of [4 x int].
158 ///    A 128-bit vector of [4 x int].
160 ///    A 128-bit vector of [4 x int].
164 ///    A 128-bit vector of [4 x int].
190 /// B[0] := __B.dword[2]
215 /// 	T1 := FF(A[i], B[i], C[i], ROUND) + D[i] + S2 + (W[i] ^ W[i+4])
218 /// 	C[i+1] := ROL32(B[i],9)
219 /// 	B[i+1] := A[i]
228 /// dst.dword[2] := B[2]
231 /// dst[MAX:128] := 0
233 #define _mm_sm3rnds2_epi32(A, B, C, D)                                         \  argument
234   (__m128i) __builtin_ia32_vsm3rnds2((__v4su)A, (__v4su)B, (__v4su)C, (int)D)