Lines Matching refs:OutputBecomesInput
10769 bool OutputBecomesInput = false; in getNDSWDS() local
10775 OutputBecomesInput = true; in getNDSWDS()
10794 OutputBecomesInput); in getNDSWDS()
10803 StringRef MangledName, bool OutputBecomesInput, in addAArch64VectorName() argument
10808 if (OutputBecomesInput) in addAArch64VectorName()
10819 bool OutputBecomesInput, in addAArch64AdvSIMDNDSNames() argument
10824 OutputBecomesInput, Fn); in addAArch64AdvSIMDNDSNames()
10826 OutputBecomesInput, Fn); in addAArch64AdvSIMDNDSNames()
10830 OutputBecomesInput, Fn); in addAArch64AdvSIMDNDSNames()
10832 OutputBecomesInput, Fn); in addAArch64AdvSIMDNDSNames()
10836 OutputBecomesInput, Fn); in addAArch64AdvSIMDNDSNames()
10838 OutputBecomesInput, Fn); in addAArch64AdvSIMDNDSNames()
10843 OutputBecomesInput, Fn); in addAArch64AdvSIMDNDSNames()
10861 const bool OutputBecomesInput = std::get<2>(Data); in emitAArch64DeclareSimdFunction() local
10905 OutputBecomesInput, Fn); in emitAArch64DeclareSimdFunction()
10913 OutputBecomesInput, Fn); in emitAArch64DeclareSimdFunction()
10915 OutputBecomesInput, Fn); in emitAArch64DeclareSimdFunction()
10919 OutputBecomesInput, Fn); in emitAArch64DeclareSimdFunction()
10923 OutputBecomesInput, Fn); in emitAArch64DeclareSimdFunction()
10933 OutputBecomesInput, Fn); in emitAArch64DeclareSimdFunction()
10942 OutputBecomesInput, Fn); in emitAArch64DeclareSimdFunction()
10944 OutputBecomesInput, Fn); in emitAArch64DeclareSimdFunction()
10948 OutputBecomesInput, Fn); in emitAArch64DeclareSimdFunction()
10952 OutputBecomesInput, Fn); in emitAArch64DeclareSimdFunction()