Lines Matching +full:v7 +full:- +full:r
1 //===--- SystemZ.cpp - Implement SystemZ target feature support -----------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
43 {{"v1"}, 20}, {{"v3"}, 21}, {{"v5"}, 22}, {{"v7"}, 23},
66 case 'Q': // Address with base and unsigned 12-bit displacement in validateAsmConstraint()
67 case 'R': // Likewise, plus an index in validateAsmConstraint()
68 case 'S': // Address with base and signed 20-bit displacement in validateAsmConstraint()
74 case 'd': // Data register (equivalent to 'r') in validateAsmConstraint()
75 case 'f': // Floating-point register in validateAsmConstraint()
80 case 'I': // Unsigned 8-bit constant in validateAsmConstraint()
81 case 'J': // Unsigned 12-bit constant in validateAsmConstraint()
82 case 'K': // Signed 16-bit constant in validateAsmConstraint()
83 case 'L': // Signed 20-bit displacement (on all targets we support) in validateAsmConstraint()
87 case 'Q': // Memory with base and unsigned 12-bit displacement in validateAsmConstraint()
88 case 'R': // Likewise, plus an index in validateAsmConstraint()
89 case 'S': // Memory with base and signed 20-bit displacement in validateAsmConstraint()
116 return -1; in getISARevision()
117 return Rev->ISARevisionID; in getISARevision()
144 // -munaligned-symbols is passed. in getMinGlobalAlign()
174 return llvm::ArrayRef(BuiltinInfo, clang::SystemZ::LastTSBuiltin - in getTargetBuiltins()