Lines Matching +full:lower +full:- +full:case

1 //===--- CSKY.cpp - Implement CSKY target feature support -----------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
53 Builder.defineMacro("__" + ArchName.lower() + "__"); in getTargetDefines()
56 Builder.defineMacro("__" + CPUName.lower() + "__"); in getTargetDefines()
64 Builder.defineMacro(endian.lower()); in getTargetDefines()
69 Builder.defineMacro(dspv2.lower()); in getTargetDefines()
75 Builder.defineMacro(vdspv2.lower()); in getTargetDefines()
80 Builder.defineMacro(vdspv2_f.lower()); in getTargetDefines()
88 Builder.defineMacro(vdspv1_64.lower()); in getTargetDefines()
90 Builder.defineMacro(vdspv1_128.lower()); in getTargetDefines()
95 Builder.defineMacro(is3e3r1.lower()); in getTargetDefines()
101 .Case("hard-float", HardFloat) in hasFeature()
102 .Case("hard-float-abi", HardFloatABI) in hasFeature()
103 .Case("fpuv2_sf", FPUV2_SF) in hasFeature()
104 .Case("fpuv2_df", FPUV2_DF) in hasFeature()
105 .Case("fpuv3_sf", FPUV3_SF) in hasFeature()
106 .Case("fpuv3_df", FPUV3_DF) in hasFeature()
107 .Case("vdspv2", VDSPV2) in hasFeature()
108 .Case("dspv2", DSPV2) in hasFeature()
109 .Case("vdspv1", VDSPV1) in hasFeature()
110 .Case("3e3r1", is3E3R1) in hasFeature()
117 if (Feature == "+hard-float") in handleTargetFeatures()
119 if (Feature == "+hard-float-abi") in handleTargetFeatures()
297 case 'a': in validateAsmConstraint()
298 case 'b': in validateAsmConstraint()
299 case 'c': in validateAsmConstraint()
300 case 'y': in validateAsmConstraint()
301 case 'l': in validateAsmConstraint()
302 case 'h': in validateAsmConstraint()
303 case 'w': in validateAsmConstraint()
304 case 'v': // A floating-point and vector register. in validateAsmConstraint()
305 case 'z': in validateAsmConstraint()