Lines Matching +full:36 +full:- +full:bit
2 #------------------------------------------------------------------------------
16 >4 byte 1 32-bit
17 >4 byte 2 64-bit
37 # Core handling from Peter Tobias <tobias@server.et-inf.fho-emden.de>
42 >>16 leshort &0xff00 processor-specific,
44 >>18 leshort 1 AT&T WE32100 - invalid byte order,
45 >>18 leshort 2 SPARC - invalid byte order,
47 >>18 leshort 4 Motorola 68000 - invalid byte order,
48 >>18 leshort 5 Motorola 88000 - invalid byte order,
51 >>18 leshort 8 MIPS R3000_BE - invalid byte order,
52 >>18 leshort 9 Amdahl - invalid byte order,
54 >>18 leshort 11 RS6000 - invalid byte order,
55 >>18 leshort 15 PA-RISC - invalid byte order,
63 >>36 lelong 1 MathCoPro/FPU/MAU Required
73 >>16 beshort &0xff00 processor-specific,
77 >>18 beshort 3 Intel i386 - invalid byte order,
80 >>18 beshort 6 Intel i486 - invalid byte order,
84 >>18 beshort 10 MIPS R3000_LE - invalid byte order,
86 >>18 beshort 15 PA-RISC,
94 >>18 beshort 36 cisco 12000,
98 >>36 belong 1 MathCoPro/FPU/MAU Required