Lines Matching +full:implementation +full:- +full:defined

29  * This file contains compile-time flags that can override the
31  * deactivates the feature if defined to 0, activates it if defined to a
32  * non-zero integer (normally 1). If the macro is not defined, then
37  * When BR_64 is enabled, 64-bit integer types are assumed to be
38  * efficient (i.e. the architecture has 64-bit registers and can
39  * do 64-bit operations as fast as 32-bit operations).
45  * When BR_LOMUL is enabled, then multiplications of 32-bit values whose
47  * substantially more efficient than 32-bit multiplications that yield
48  * 64-bit results. This is typically the case on low-end ARM Cortex M
64  * When BR_SLOW_MUL15 is enabled, short multplications (on 15-bit words)
73  * When BR_CT_MUL31 is enabled, multiplications of 31-bit values (used
74  * in the "i31" big integer implementation) use an alternate implementation
76  * ensure constant-time multiplications even on architectures where the
83  * When BR_CT_MUL15 is enabled, multiplications of 15-bit values (held
84  * in 32-bit words) use an alternate implementation which is slower and
86  * constant-time multiplications on most/all architectures where the
87  * basic multiplication is not constant-time.
95  * relying on an implementation-defined behaviour. However, most if not
143  * Note: if both BR_USE_URANDOM and BR_USE_WIN32_RAND are defined, the
163  * Note: if both BR_USE_UNIX_TIME and BR_USE_WIN32_TIME are defined, the
173  *   - target architecture is ARM in Thumb mode
174  *   - target endianness is little-endian
175  *   - compiler is GCC (or GCC-compatible for inline assembly syntax)
177  * This is meant for the low-end cores (Cortex M0, M0+, M1, M3).
185  * When BR_AES_X86NI is enabled, the AES implementation using the x86 "NI"
187  * enabled explicitly, then that AES implementation will be compiled only
189  * implementation will not be compiled at all.
205  * When BR_POWER8 is enabled, the AES implementation using the POWER ISA
207  * If this is not enabled explicitly, then that implementation will be
216  * and 'unsigned __int128' types will be used to leverage 64x64->128
218  * compilers on 64-bit architectures.
225  * '_addcarry_u64()' intrinsics will be used to implement 64x64->128
233  * assumed to use little-endian encoding for integers, and to tolerate
241  * assumed to use big-endian encoding for integers, and to tolerate