Lines Matching +full:48 +full:- +full:bit
2 * memcpy - copy memory area
4 * Copyright (c) 2013-2022, Arm Limited.
5 * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception
9 This memcpy routine is optimised for Cortex-A15 cores and takes advantage
14 ARMv6 (ARMv7-a if using Neon)
29 .arch armv7-a
69 #define A_l r2 /* Call-clobbered. */
70 #define A_h r3 /* Call-clobbered. */
79 /* Number of lines ahead to pre-fetch data. If you change this the code
95 vldr \vreg, [src, #\base + prefetch_lines * 64 - 32]
98 vstr d1, [dst, #\base + 48]
99 vldr d1, [src, #\base + 48]
116 vstr d1, [dst, #\base + 48]
117 vldr d1, [src, #\base + 48]
134 rsb tmp1, tmp1, #(56 - PC_OFFSET + INSN_SIZE)
160 rsb tmp1, tmp1, #(60 - PC_OFFSET/2 + INSN_SIZE/2)
164 ldr tmp1, [src, #-60] /* 15 words to go. */
165 str tmp1, [dst, #-60]
167 ldr tmp1, [src, #-56] /* 14 words to go. */
168 str tmp1, [dst, #-56]
169 ldr tmp1, [src, #-52]
170 str tmp1, [dst, #-52]
172 ldr tmp1, [src, #-48] /* 12 words to go. */
173 str tmp1, [dst, #-48]
174 ldr tmp1, [src, #-44]
175 str tmp1, [dst, #-44]
177 ldr tmp1, [src, #-40] /* 10 words to go. */
178 str tmp1, [dst, #-40]
179 ldr tmp1, [src, #-36]
180 str tmp1, [dst, #-36]
182 ldr tmp1, [src, #-32] /* 8 words to go. */
183 str tmp1, [dst, #-32]
184 ldr tmp1, [src, #-28]
185 str tmp1, [dst, #-28]
187 ldr tmp1, [src, #-24] /* 6 words to go. */
188 str tmp1, [dst, #-24]
189 ldr tmp1, [src, #-20]
190 str tmp1, [dst, #-20]
192 ldr tmp1, [src, #-16] /* 4 words to go. */
193 str tmp1, [dst, #-16]
194 ldr tmp1, [src, #-12]
195 str tmp1, [dst, #-12]
197 ldr tmp1, [src, #-8] /* 2 words to go. */
198 str tmp1, [dst, #-8]
199 ldr tmp1, [src, #-4]
200 str tmp1, [dst, #-4]
212 str tmp2, [sp, #-FRAME_SIZE]!
219 /* Magic dust alert! Force VFP on Cortex-A9. Experiments show
225 /* SRC and DST have the same mutual 64-bit alignment, but we may
226 still need to pre-copy some bytes to get to natural alignment.
227 We bring SRC and DST into full 64-bit alignment. */
262 vldr d0, [src, #48]
265 vstr d0, [dst, #48]
277 rsb tmp1, tmp1, #(56 - PC_OFFSET + INSN_SIZE)
280 vldr d0, [src, #-56] /* 14 words to go. */
281 vstr d0, [dst, #-56]
282 vldr d0, [src, #-48] /* 12 words to go. */
283 vstr d0, [dst, #-48]
284 vldr d0, [src, #-40] /* 10 words to go. */
285 vstr d0, [dst, #-40]
286 vldr d0, [src, #-32] /* 8 words to go. */
287 vstr d0, [dst, #-32]
288 vldr d0, [src, #-24] /* 6 words to go. */
289 vstr d0, [dst, #-24]
290 vldr d0, [src, #-16] /* 4 words to go. */
291 vstr d0, [dst, #-16]
292 vldr d0, [src, #-8] /* 2 words to go. */
293 vstr d0, [dst, #-8]
308 ldrd A_l, A_h, [src, #48]
309 strd A_l, A_h, [dst, #48]
325 /* Copy up to 7 d-words of data. Similar to Ltail63unaligned, but
326 we know that the src and dest are 64-bit aligned so we can use
334 rsb tmp1, tmp1, #(56 - PC_OFFSET + INSN_SIZE)
336 ldrd A_l, A_h, [src, #-56] /* 14 words to go. */
337 strd A_l, A_h, [dst, #-56]
338 ldrd A_l, A_h, [src, #-48] /* 12 words to go. */
339 strd A_l, A_h, [dst, #-48]
340 ldrd A_l, A_h, [src, #-40] /* 10 words to go. */
341 strd A_l, A_h, [dst, #-40]
342 ldrd A_l, A_h, [src, #-32] /* 8 words to go. */
343 strd A_l, A_h, [dst, #-32]
344 ldrd A_l, A_h, [src, #-24] /* 6 words to go. */
345 strd A_l, A_h, [dst, #-24]
346 ldrd A_l, A_h, [src, #-16] /* 4 words to go. */
347 strd A_l, A_h, [dst, #-16]
348 ldrd A_l, A_h, [src, #-8] /* 2 words to go. */
349 strd A_l, A_h, [dst, #-8]
418 vstr d1, [dst, #64 + 48]
427 /* Pre-bias src and dst. */
448 strd B_l, B_h, [dst, #48]
449 ldrd B_l, B_h, [src, #48]
465 /* Save the remaining bytes and restore the callee-saved regs. */
468 strd B_l, B_h, [dst, #48]
486 /* Bring DST to 64-bit alignment. */
507 vld1.8 {d0-d3}, [src]!
508 vld1.8 {d4-d7}, [src]!
513 vst1.8 {d0-d3}, [ALIGN (dst, 64)]!
514 vld1.8 {d0-d3}, [src]!
515 vst1.8 {d4-d7}, [ALIGN (dst, 64)]!
516 vld1.8 {d4-d7}, [src]!
520 vst1.8 {d0-d3}, [ALIGN (dst, 64)]!
521 vst1.8 {d4-d7}, [ALIGN (dst, 64)]!
542 pld [src, #(5 * 64) - (32 - 4)]
546 strd B_l, B_h, [dst, #48]
548 ldr B_h, [src, #48]
571 /* Save the remaining bytes and restore the callee-saved regs. */
574 strd B_l, B_h, [dst, #48]