Lines Matching +full:count +full:- +full:up

2  * memcpy - copy memory area
4  * Copyright (c) 2019-2023, Arm Limited.
5  * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception
10  * ARMv8-a, AArch64, Advanced SIMD, SVE, unaligned accesses.
16 .arch armv8-a+sve
20 #define count	x2  macro
41    Copies are split into 3 main cases: small copies of up to 32 bytes, medium
42    copies of up to 128 bytes, and large copies.  The overhead of the overlap
46    The source pointer is 16-byte aligned to minimize unaligned accesses.
52 	cmp	count, 128
55 	cmp	count, vlen, lsl 1
58 	whilelo p0.b, xzr, count
59 	whilelo p1.b, vlen, count
68 	add	srcend, src, count
69 	add	dstend, dstin, count
71 	ldp	C_q, D_q, [srcend, -32]
72 	cmp	count, 64
75 	stp	C_q, D_q, [dstend, -32]
81 	cmp	count, 96
83 	ldp	G_q, H_q, [srcend, -64]
84 	stp	G_q, H_q, [dstend, -64]
88 	stp	C_q, D_q, [dstend, -32]
93 	add	srcend, src, count
94 	add	dstend, dstin, count
98 	cmp	tmp1, count
101 	/* Copy 16 bytes and then align src to 16-byte alignment.  */
106 	add	count, count, tmp1	/* Count is now 16 too large.  */
110 	subs	count, count, 128 + 16	/* Test and readjust count.  */
119 	subs	count, count, 64
124 	ldp	E_q, F_q, [srcend, -64]
126 	ldp	A_q, B_q, [srcend, -32]
128 	stp	E_q, F_q, [dstend, -64]
129 	stp	A_q, B_q, [dstend, -32]
133 	   Copy 16 bytes and then align srcend to 16-byte alignment.  */
136 	ldr	D_q, [srcend, -16]
139 	sub	count, count, tmp1
140 	ldp	A_q, B_q, [srcend, -32]
141 	str	D_q, [dstend, -16]
142 	ldp	C_q, D_q, [srcend, -64]
144 	subs	count, count, 128
148 	str	B_q, [dstend, -16]
149 	str	A_q, [dstend, -32]
150 	ldp	A_q, B_q, [srcend, -96]
151 	str	D_q, [dstend, -48]
152 	str	C_q, [dstend, -64]!
153 	ldp	C_q, D_q, [srcend, -128]
155 	subs	count, count, 64
161 	stp	A_q, B_q, [dstend, -32]
163 	stp	C_q, D_q, [dstend, -64]