Lines Matching +full:y +full:- +full:offset

2  * Single-precision vector log10 function.
4 * Copyright (c) 2020-2024, Arm Limited.
5 * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception
21 [-1/3, 1/3] (offset=2/3). Max. relative error: 0x1.068ee468p-25. */
22 .c0 = V4 (-0x1.bcb79cp-3f),
23 .c1 = 0x1.2879c8p-3f,
24 .c2 = V4 (-0x1.bcd472p-4f),
25 .c3 = 0x1.6408f8p-4f,
26 .c4 = V4 (-0x1.246f8p-4f),
27 .c5 = 0x1.f0e514p-5f,
28 .c6 = V4 (-0x1.0fc92cp-4f),
29 .c7 = 0x1.f5f76ap-5f,
30 .ln2 = V4 (0x1.62e43p-1f),
31 .inv_ln10 = V4 (0x1.bcb7b2p-2f),
33 optimised register use subnormals are detected after offset has been
34 subtracted, so lower bound is 0x0080000 - offset (which wraps around). */
35 .offset_lower_bound = V4 (0x00800000 - 0x3f2aaaab),
36 .special_bound = V8 (0x7f00), /* top16(asuint32(inf) - 0x00800000). */
42 special_case (float32x4_t y, uint32x4_t u_off, float32x4_t p, float32x4_t r2, in special_case() argument
46 return v_call_f32 (log10f, vreinterpretq_f32_u32 (vaddq_u32 (u_off, d->off)), in special_case()
47 vfmaq_f32 (y, p, r2), vmovl_u16 (cmp)); in special_case()
51 uses a similar approach as AdvSIMD logf with the same offset (i.e., 2/3) and
54 _ZGVnN4v_log10f(0x1.555c16p+0) got 0x1.ffe2fap-4
55 want 0x1.ffe2f4p-4. */
59 float32x4_t c1357 = vld1q_f32 (&d->c1); in V_NAME_F1()
60 /* To avoid having to mov x out of the way, keep u after offset has been in V_NAME_F1()
61 applied, and recover x by adding the offset back in the special-case in V_NAME_F1()
66 u_off = vsubq_u32 (u_off, d->off); in V_NAME_F1()
70 uint16x4_t special = vcge_u16 (vsubhn_u32 (u_off, d->offset_lower_bound), in V_NAME_F1()
71 vget_low_u16 (d->special_bound)); in V_NAME_F1()
73 uint32x4_t u = vaddq_u32 (vandq_u32 (u_off, d->mantissa_mask), d->off); in V_NAME_F1()
76 /* y = log10(1+r) + n * log10(2). */ in V_NAME_F1()
79 float32x4_t c01 = vfmaq_laneq_f32 (d->c0, r, c1357, 0); in V_NAME_F1()
80 float32x4_t c23 = vfmaq_laneq_f32 (d->c2, r, c1357, 1); in V_NAME_F1()
81 float32x4_t c45 = vfmaq_laneq_f32 (d->c4, r, c1357, 2); in V_NAME_F1()
82 float32x4_t c67 = vfmaq_laneq_f32 (d->c6, r, c1357, 3); in V_NAME_F1()
88 /* y = Log10(2) * n + poly * InvLn(10). */ in V_NAME_F1()
89 float32x4_t y = vfmaq_f32 (r, d->ln2, n); in V_NAME_F1() local
90 y = vmulq_f32 (y, d->inv_ln10); in V_NAME_F1()
93 return special_case (y, u_off, poly, r2, special, d); in V_NAME_F1()
94 return vfmaq_f32 (y, poly, r2); in V_NAME_F1()
101 TEST_INTERVAL (V_NAME_F1 (log10), -0.0, -inf, 100)
102 TEST_INTERVAL (V_NAME_F1 (log10), 0, 0x1p-126, 100)
103 TEST_INTERVAL (V_NAME_F1 (log10), 0x1p-126, 0x1p-23, 50000)
104 TEST_INTERVAL (V_NAME_F1 (log10), 0x1p-23, 1.0, 50000)