52   float64x2_t erfc;  member
61       = vld1q_f64 (&__v_erfc_data.tab[vgetq_lane_u64 (i, 0) - Off].erfc);  in lookup()
63       = vld1q_f64 (&__v_erfc_data.tab[vgetq_lane_u64 (i, 1) - Off].erfc);  in lookup()
64   e.erfc = vuzp1q_f64 (e1, e2);  in lookup()
73   return v_call_f64 (erfc, x, y, cmp);  in special_case()
104 float64x2_t V_NAME_D1 (erfc) (float64x2_t x)  in V_NAME_D1()  argument
180   y = vfmsq_f64 (e.erfc, e.scale, vfmsq_f64 (d, d2, y));  in V_NAME_D1()
198 TEST_SIG (V, D, 1, erfc, -6.0, 28.0)
199 TEST_ULP (V_NAME_D1 (erfc), 1.21)
200 TEST_DISABLE_FENV_IF_NOT (V_NAME_D1 (erfc), WANT_SIMD_EXCEPT)
201 TEST_SYM_INTERVAL (V_NAME_D1 (erfc), 0, 0x1p-26, 40000)
202 TEST_INTERVAL (V_NAME_D1 (erfc), 0x1p-26, 28.0, 40000)
203 TEST_INTERVAL (V_NAME_D1 (erfc), -0x1p-26, -6.0, 40000)
204 TEST_INTERVAL (V_NAME_D1 (erfc), 28.0, inf, 40000)
205 TEST_INTERVAL (V_NAME_D1 (erfc), -6.0, -inf, 40000)