Merge head from 7/28

Some further DWC OTG improvements for full speed and low speed devices:
- Revert r265427. It appears we are halting the DWC OTG host
controller schedule if we process events only at every SOF. When d

Some further DWC OTG improvements for full speed and low speed devices:
- Revert r265427. It appears we are halting the DWC OTG host
controller schedule if we process events only at every SOF. When doing
split transactions we rely on that events are processed quickly and
waiting too long might cause data loss.
- We are not always able to meet the timing requirements of interrupt
endpoint split transactions. Switch from INTERRUPT to CONTROL endpoint
type for interrupt endpoint events until further, hence CONTROL
endpoint events are more relaxed, reducing the chance of data
loss. See comment in code for more in-depth explanation.
- Simplify TT scheduling.

MFC after: 3 days

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Try to fix DWC OTG regression issues with full and low speed devices:
- Remove double buffering interrupt and isochronous traffic via the
transaction translator. It can be avoided because the DWC OTG

Try to fix DWC OTG regression issues with full and low speed devices:
- Remove double buffering interrupt and isochronous traffic via the
transaction translator. It can be avoided because the DWC OTG will
always delay the start split transactions for interrupt and
isochronous traffic, but will not delay the complete split
transactions, if we set the odd frame bit correctly.
- Need to check the transfer cache field in the device done function
to be sure all allocated channels are freed and not the transfer first
one. This seems to resolve the control endpoint transfer type quirk
which is now removed.
- Make sure any received data upon TX is dumped else RX path will
stop.
- Transmit isochronous data before receiving isochronous data as a
means to optimise the TT schedule.
- Implement a simple TT bandwidth scheduler.
- Cleanup use of old "td->error" variable.
- On interrupt IN traffic via the transaction translator we simply
ignore missed transfer opportunities and silently retry the
transaction upon next available time slot.

MFC after: 3 days

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MFC @ r266724

An SVM update will follow this.

IFC @266473

- Add softc pointer argument to FIFO functions as an optimisation.
- Implement support for interrupt filters in the DWC OTG driver, to
reduce the amount of CPU task switching when only feeding the FI

- Add softc pointer argument to FIFO functions as an optimisation.
- Implement support for interrupt filters in the DWC OTG driver, to
reduce the amount of CPU task switching when only feeding the FIFOs.
- Add common spinlock to the USB bus structure.

MFC after: 2 weeks

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Optimise host mode data roundtrip time. When BULK data is submitted to
the main processing queue, clear the NAK counter for any associated
BULK or CONTROL transfers and poll the endpoint(s) for 1 mil

Optimise host mode data roundtrip time. When BULK data is submitted to
the main processing queue, clear the NAK counter for any associated
BULK or CONTROL transfers and poll the endpoint(s) for 1 millisecond
at 125us rate interval, before going into slow, 10ms, NAK polling mode
again. This has the effect that typical ping-ping protocols respond
quicker when initiated from the USB host.

MFC after: 2 weeks

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Optimise host channel disabling:
- For non-periodic traffic we only need to wait two SOFs before
disabling the channel.
- Make sure we release the TX FIFO tracking level after the host
channel is dis

Optimise host channel disabling:
- For non-periodic traffic we only need to wait two SOFs before
disabling the channel.
- Make sure we release the TX FIFO tracking level after the host
channel is disabled.
- Make sure the host channel state gets reset/disabled initially.
- Two minor code style changes.

MFC after: 2 weeks

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Multiple DWC OTG host mode related fixes and improvements:

- Rework how we allocate and free USB host channels, so that we only
allocate a channel if there is a real packet going out on the USB
cabl

Multiple DWC OTG host mode related fixes and improvements:

- Rework how we allocate and free USB host channels, so that we only
allocate a channel if there is a real packet going out on the USB
cable.

- Use BULK type for control data and status, due to instabilities in
the HW it appears.

- Split FIFO TX levels into one for the periodic FIFO and one for the
non-periodic FIFO.

- Use correct HFNUM mask when scheduling host transactions. The HFNUM
register does not count the full 16-bit range.

- Correct START/COMPLETION slot for TT transactions. For INTERRUPT and
ISOCHRONOUS type transactions the hardware always respects the ODDFRM
bit, which means we need to allocate multiple host channels when
processing such endpoints, to not miss any so-called complete split
opportunities.

- When doing ISOCHRONOUS OUT transfers through a TT send all data
payload in a single ALL-burst. This deacreases the likelyhood for
isochronous data underruns.

- Fixed unbalanced unlock in case of "dwc_otg_init_fifo()" failure.

- Increase interrupt priority.

MFC after: 2 weeks

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Merge from head

Improve DWC OTG USB host side support for isochronous FULL and HIGH
speed data traffic going directly to a USB device or through a
so-called USB transaction translator.

Add checks that we are not ov

Improve DWC OTG USB host side support for isochronous FULL and HIGH
speed data traffic going directly to a USB device or through a
so-called USB transaction translator.

Add checks that we are not overusing the TX FIFO.

MFC after: 2 weeks

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Merge fresh head.

Sync with HEAD.

MFC

MFC @ r241285

IFC @ r242940

IFC @ r242684

Fix LOW and FULL speed USB INTERRUPT endpoint support for the
DWC OTG driver. Fix a hang issue when using LOW and FULL speed
BULK traffic. Make sure we don't ask for data in the last
microframe. This

Fix LOW and FULL speed USB INTERRUPT endpoint support for the
DWC OTG driver. Fix a hang issue when using LOW and FULL speed
BULK traffic. Make sure we don't ask for data in the last
microframe. This allows using devices like USB mice and USB
keyboards connected to the RPI-B.

Suggested by: gonzo @

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Sync from head

Make sure we record NAK tokens in the TD structure for IN direction.
Improve host channel disabling. Wait two times 125us for channel to be
disabled. The DWC OTG doesn't like when channels are re-use

Make sure we record NAK tokens in the TD structure for IN direction.
Improve host channel disabling. Wait two times 125us for channel to be
disabled. The DWC OTG doesn't like when channels are re-used too early.

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Make sure the DWC OTG host mode channels are given enough time to disable.

DWC OTG host mode improvements. Add support for the 3-strikes and you are
gone rule. Optimise use of channels so that when a channel
is not ready another channel is used. Instead of using the SOF int

DWC OTG host mode improvements. Add support for the 3-strikes and you are
gone rule. Optimise use of channels so that when a channel
is not ready another channel is used. Instead of using the SOF interrupt
use the system timer to drive the host statemachine. This might
give lower throughput and higher latency, but reduces the CPU usage
significantly. The DWC OTG host mode support should not be considered
for serious USB host controller applications. Some problems are still
seen with LOW speed USB devices.

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DWC OTG improvements. Implement full support for SPLIT transactions, in other
words FULL/LOW speed devices through HIGH speed HUBs. Improve support for
suspend and resume in host mode.

Fix TX FIFO sizes. Correct FIFO handling in Host mode.

Reduce DWC OTG polling rate by using the SOF interrupt.