#
ccf6415e |
| 23-Jul-2009 |
Nathan Whitehorn <nwhitehorn@FreeBSD.org> |
Fix serial console on Apple Xserve G5 by falling back to input-device-1 if input-device is unavailable. The Xserve G5 defaults to using screen/keyboard for output-device/input-device even if these ar
Fix serial console on Apple Xserve G5 by falling back to input-device-1 if input-device is unavailable. The Xserve G5 defaults to using screen/keyboard for output-device/input-device even if these are not installed, and then falls back to serial ports at boot time.
Reviewed by: marcel Hardware from: grehan Approved by: re (kib)
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Revision tags: release/7.2.0_cvs, release/7.2.0 |
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#
9c797940 |
| 13-Apr-2009 |
Oleksandr Tymoshenko <gonzo@FreeBSD.org> |
- Merge from HEAD
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#
39bc3bff |
| 09-Apr-2009 |
Marcel Moolenaar <marcel@FreeBSD.org> |
Don't use pmap_kextact() when comparing bus handles for Book-E. We typically wire translation to devices with TLB1 entries and pmap_kextract() does not know about those and returns 0. This causes fa
Don't use pmap_kextact() when comparing bus handles for Book-E. We typically wire translation to devices with TLB1 entries and pmap_kextract() does not know about those and returns 0. This causes false positives (read: all serial ports suddenly become the console).
show more ...
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#
1c96bdd1 |
| 04-Apr-2009 |
Nathan Whitehorn <nwhitehorn@FreeBSD.org> |
Add support for 64-bit PowerPC CPUs operating in the 64-bit bridge mode provided, for example, on the PowerPC 970 (G5), as well as on related CPUs like the POWER3 and POWER4.
This also adds support
Add support for 64-bit PowerPC CPUs operating in the 64-bit bridge mode provided, for example, on the PowerPC 970 (G5), as well as on related CPUs like the POWER3 and POWER4.
This also adds support for various built-in hardware found on Apple G5 hardware (e.g. the IBM CPC925 northbridge).
Reviewed by: grehan
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Revision tags: release/7.1.0_cvs, release/7.1.0, release/6.4.0_cvs, release/6.4.0 |
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#
6b7ba544 |
| 03-Mar-2008 |
Rafal Jaworowski <raj@FreeBSD.org> |
Initial support for Freescale PowerQUICC III MPC85xx system-on-chip family.
The PQ3 is a high performance integrated communications processing system based on the e500 core, which is an embedded RIS
Initial support for Freescale PowerQUICC III MPC85xx system-on-chip family.
The PQ3 is a high performance integrated communications processing system based on the e500 core, which is an embedded RISC processor that implements the 32-bit Book E definition of the PowerPC architecture. For details refer to: http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=MPC8555E
This port was tested and successfully run on the following members of the PQ3 family: MPC8533, MPC8541, MPC8548, MPC8555.
The following major integrated peripherals are supported:
* On-chip peripherals bus * OpenPIC interrupt controller * UART * Ethernet (TSEC) * Host/PCI bridge * QUICC engine (SCC functionality)
This commit brings the main functionality and will be followed by individual drivers that are logically separate from this base.
Approved by: cognet (mentor) Obtained from: Juniper, Semihalf MFp4: e500
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Revision tags: release/7.0.0_cvs, release/7.0.0, release/6.3.0_cvs, release/6.3.0 |
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#
de2fa7b8 |
| 19-Dec-2007 |
Marcel Moolenaar <marcel@FreeBSD.org> |
Redefine bus_space_tag_t on PowerPC from a 32-bit integral to a pointer to struct bus_space. The structure contains function pointers that do the actual bus space access.
The reason for this change
Redefine bus_space_tag_t on PowerPC from a 32-bit integral to a pointer to struct bus_space. The structure contains function pointers that do the actual bus space access.
The reason for this change is that previously all bus space accesses were little endian (i.e. had an explicit byte-swap for multi-byte accesses), because all busses on Macs are little endian. The upcoming support for Book E, and in particular the E500 core, requires support for big-endian busses because all embedded peripherals are in the native byte-order.
With this change, there's no distinction between I/O port space and memory mapped I/O. PowerPC doesn't have I/O port space. Busses assign tags based on the byte-order only. For that purpose, two global structures exist (bs_be_tag and bs_le_tag), of which the address can be taken to get a valid tag.
Obtained from: Juniper, Semihalf
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#
f8100ce2 |
| 03-Apr-2007 |
Marcel Moolenaar <marcel@FreeBSD.org> |
Don't expose the uart_ops structure directly, but instead have it obtained through the uart_class structure. This allows us to declare the uart_class structure as weak and as such allows us to refere
Don't expose the uart_ops structure directly, but instead have it obtained through the uart_class structure. This allows us to declare the uart_class structure as weak and as such allows us to reference it even when it's not compiled-in. It also allows is to get the uart_ops structure by name, which makes it possible to implement the dt tag handling in uart_getenv(). The side-effect of all this is that we're using the uart_class structure more consistently which means that we now also have access to the size of the bus space block needed by the hardware when we map the bus space, eliminating any hardcoding.
show more ...
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Revision tags: release/6.2.0_cvs, release/6.2.0 |
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#
e997db5d |
| 26-Jul-2006 |
Marcel Moolenaar <marcel@FreeBSD.org> |
Implement uart_cpu_eqres() and uart_cpu_getdev(). This allows FreeBSD to use a serial console, as per the OFW settings.
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Revision tags: release/5.5.0_cvs, release/5.5.0, release/6.1.0_cvs, release/6.1.0 |
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#
ce8f0013 |
| 31-Mar-2006 |
Marcel Moolenaar <marcel@FreeBSD.org> |
Allow uart(4) to be built on PowerPC.
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#
11e9b8ba |
| 04-Aug-2009 |
Oleksandr Tymoshenko <gonzo@FreeBSD.org> |
- MFC @196061
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#
ccf6415e |
| 23-Jul-2009 |
Nathan Whitehorn <nwhitehorn@FreeBSD.org> |
Fix serial console on Apple Xserve G5 by falling back to input-device-1 if input-device is unavailable. The Xserve G5 defaults to using screen/keyboard for output-device/input-device even if these ar
Fix serial console on Apple Xserve G5 by falling back to input-device-1 if input-device is unavailable. The Xserve G5 defaults to using screen/keyboard for output-device/input-device even if these are not installed, and then falls back to serial ports at boot time.
Reviewed by: marcel Hardware from: grehan Approved by: re (kib)
show more ...
|
Revision tags: release/7.2.0_cvs, release/7.2.0 |
|
#
9c797940 |
| 13-Apr-2009 |
Oleksandr Tymoshenko <gonzo@FreeBSD.org> |
- Merge from HEAD
|
#
39bc3bff |
| 09-Apr-2009 |
Marcel Moolenaar <marcel@FreeBSD.org> |
Don't use pmap_kextact() when comparing bus handles for Book-E. We typically wire translation to devices with TLB1 entries and pmap_kextract() does not know about those and returns 0. This causes fa
Don't use pmap_kextact() when comparing bus handles for Book-E. We typically wire translation to devices with TLB1 entries and pmap_kextract() does not know about those and returns 0. This causes false positives (read: all serial ports suddenly become the console).
show more ...
|
#
1c96bdd1 |
| 04-Apr-2009 |
Nathan Whitehorn <nwhitehorn@FreeBSD.org> |
Add support for 64-bit PowerPC CPUs operating in the 64-bit bridge mode provided, for example, on the PowerPC 970 (G5), as well as on related CPUs like the POWER3 and POWER4.
This also adds support
Add support for 64-bit PowerPC CPUs operating in the 64-bit bridge mode provided, for example, on the PowerPC 970 (G5), as well as on related CPUs like the POWER3 and POWER4.
This also adds support for various built-in hardware found on Apple G5 hardware (e.g. the IBM CPC925 northbridge).
Reviewed by: grehan
show more ...
|
Revision tags: release/7.1.0_cvs, release/7.1.0, release/6.4.0_cvs, release/6.4.0 |
|
#
6b7ba544 |
| 03-Mar-2008 |
Rafal Jaworowski <raj@FreeBSD.org> |
Initial support for Freescale PowerQUICC III MPC85xx system-on-chip family.
The PQ3 is a high performance integrated communications processing system based on the e500 core, which is an embedded RIS
Initial support for Freescale PowerQUICC III MPC85xx system-on-chip family.
The PQ3 is a high performance integrated communications processing system based on the e500 core, which is an embedded RISC processor that implements the 32-bit Book E definition of the PowerPC architecture. For details refer to: http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=MPC8555E
This port was tested and successfully run on the following members of the PQ3 family: MPC8533, MPC8541, MPC8548, MPC8555.
The following major integrated peripherals are supported:
* On-chip peripherals bus * OpenPIC interrupt controller * UART * Ethernet (TSEC) * Host/PCI bridge * QUICC engine (SCC functionality)
This commit brings the main functionality and will be followed by individual drivers that are logically separate from this base.
Approved by: cognet (mentor) Obtained from: Juniper, Semihalf MFp4: e500
show more ...
|
Revision tags: release/7.0.0_cvs, release/7.0.0, release/6.3.0_cvs, release/6.3.0 |
|
#
de2fa7b8 |
| 19-Dec-2007 |
Marcel Moolenaar <marcel@FreeBSD.org> |
Redefine bus_space_tag_t on PowerPC from a 32-bit integral to a pointer to struct bus_space. The structure contains function pointers that do the actual bus space access.
The reason for this change
Redefine bus_space_tag_t on PowerPC from a 32-bit integral to a pointer to struct bus_space. The structure contains function pointers that do the actual bus space access.
The reason for this change is that previously all bus space accesses were little endian (i.e. had an explicit byte-swap for multi-byte accesses), because all busses on Macs are little endian. The upcoming support for Book E, and in particular the E500 core, requires support for big-endian busses because all embedded peripherals are in the native byte-order.
With this change, there's no distinction between I/O port space and memory mapped I/O. PowerPC doesn't have I/O port space. Busses assign tags based on the byte-order only. For that purpose, two global structures exist (bs_be_tag and bs_le_tag), of which the address can be taken to get a valid tag.
Obtained from: Juniper, Semihalf
show more ...
|
#
f8100ce2 |
| 03-Apr-2007 |
Marcel Moolenaar <marcel@FreeBSD.org> |
Don't expose the uart_ops structure directly, but instead have it obtained through the uart_class structure. This allows us to declare the uart_class structure as weak and as such allows us to refere
Don't expose the uart_ops structure directly, but instead have it obtained through the uart_class structure. This allows us to declare the uart_class structure as weak and as such allows us to reference it even when it's not compiled-in. It also allows is to get the uart_ops structure by name, which makes it possible to implement the dt tag handling in uart_getenv(). The side-effect of all this is that we're using the uart_class structure more consistently which means that we now also have access to the size of the bus space block needed by the hardware when we map the bus space, eliminating any hardcoding.
show more ...
|
Revision tags: release/6.2.0_cvs, release/6.2.0 |
|
#
e997db5d |
| 26-Jul-2006 |
Marcel Moolenaar <marcel@FreeBSD.org> |
Implement uart_cpu_eqres() and uart_cpu_getdev(). This allows FreeBSD to use a serial console, as per the OFW settings.
|
Revision tags: release/5.5.0_cvs, release/5.5.0, release/6.1.0_cvs, release/6.1.0 |
|
#
ce8f0013 |
| 31-Mar-2006 |
Marcel Moolenaar <marcel@FreeBSD.org> |
Allow uart(4) to be built on PowerPC.
|