IFC @ r254014

IFC @253398

IFC @ r252763

Teach UART to attach Exynos/s3/s5 class driver.

Submitted by: Ruslan Bukin <br@bsdpad.com>
Reviewed by: gonzo

Merge fresh head.

Add Xilinx Zynq ARM/FPGA SoC support to FreeBSD/arm port.

Submitted by: Thomas Skibo <ThomasSkibo (at) sbcglobal.net>
Tested by: wkoszek (ZedBoard)
Reviewed by: wkoszek, freebsd-arm@ (no objections

Add Xilinx Zynq ARM/FPGA SoC support to FreeBSD/arm port.

Submitted by: Thomas Skibo <ThomasSkibo (at) sbcglobal.net>
Tested by: wkoszek (ZedBoard)
Reviewed by: wkoszek, freebsd-arm@ (no objections raised)

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sync from head

Integrate Efika MX project back to home.

Sponsored by: The FreeBSD Foundation

MFC @ r241285

IFC @ r242684

Sync from head

Merge head r233826 through r240095.

Add PrimeCell UART (PL011) driver

Obtained from: Semihalf

Merging of projects/armv6, part 8

r235162:

Initial LPC32x0 support. Includes DTS file for Embedded Artists EA3250
board.

Peripherals currently supported:
- Serial ports
- Interrupt contr

Merging of projects/armv6, part 8

r235162:

Initial LPC32x0 support. Includes DTS file for Embedded Artists EA3250
board.

Peripherals currently supported:
- Serial ports
- Interrupt controller
- Timers
- Ethernet
- USB host
- Framebuffer (in conjunction with SSD1289 LCD controller)
- RTC
- SPI
- GPIO

Submitted by: Jakub Wojciech Klama <jceel@freebsd.org>

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Update to current version of head.

Merge svn+ssh://svn.freebsd.org/base/head@206571

Add sbbc(4), a driver for the BootBus controller found in Serengeti and
StarCat systems which provides time-of-day services for both as well as
console service for Serengeti, i.e. Sun Fire V1280. Whi

Add sbbc(4), a driver for the BootBus controller found in Serengeti and
StarCat systems which provides time-of-day services for both as well as
console service for Serengeti, i.e. Sun Fire V1280. While the latter is
described with a device type of serial in the OFW device tree, it isn't
actually an UART. Nevertheless the console service is handled by uart(4)
as this allowed to re-use quite a bit of MD and MI code. Actually, this
idea is stolen from Linux which interfaces the sun4v hypervisor console
with the Linux counterpart of uart(4).

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Add minimal support for SGI Altix l1 console -- a SAL-based character
device. This may not be here to stay, because it's not a real serial
device. Then again, who cares?

Add the 2nd CCU and PnP devices support on pc98.

Reviewed by: imp
Obtained from: //depot/projects/uart with some fixes

add device hints to control the rx FIFO interrupt level on 16550A parts

PR: kern/121421
Submitted by: UEMURA Tetsuya
Reviewed by: marcel
MFC after: 2 weeks

Initial support for Freescale PowerQUICC III MPC85xx system-on-chip family.

The PQ3 is a high performance integrated communications processing system
based on the e500 core, which is an embedded RIS

Initial support for Freescale PowerQUICC III MPC85xx system-on-chip family.

The PQ3 is a high performance integrated communications processing system
based on the e500 core, which is an embedded RISC processor that implements
the 32-bit Book E definition of the PowerPC architecture. For details refer
to: http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=MPC8555E

This port was tested and successfully run on the following members of the PQ3
family: MPC8533, MPC8541, MPC8548, MPC8555.

The following major integrated peripherals are supported:

* On-chip peripherals bus
* OpenPIC interrupt controller
* UART
* Ethernet (TSEC)
* Host/PCI bridge
* QUICC engine (SCC functionality)

This commit brings the main functionality and will be followed by individual
drivers that are logically separate from this base.

Approved by: cognet (mentor)
Obtained from: Juniper, Semihalf
MFp4: e500

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Don't expose the uart_ops structure directly, but instead have
it obtained through the uart_class structure. This allows us
to declare the uart_class structure as weak and as such allows
us to refere

Don't expose the uart_ops structure directly, but instead have
it obtained through the uart_class structure. This allows us
to declare the uart_class structure as weak and as such allows
us to reference it even when it's not compiled-in.
It also allows is to get the uart_ops structure by name, which
makes it possible to implement the dt tag handling in uart_getenv().
The side-effect of all this is that we're using the uart_class
structure more consistently which means that we now also have
access to the size of the bus space block needed by the hardware
when we map the bus space, eliminating any hardcoding.

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Remove definitions of uart_[gs]etdreg. They are not used anymore and
were in fact wrong.

Start each of the license/copyright comments with /*-, minor shuffle of lines

Revert the introduction of iobase in struct uart_bas. Both the SAB82532
and the Z8530 drivers used the I/O address as a quick and dirty way to
determine which channel they operated on, but formalizin

Revert the introduction of iobase in struct uart_bas. Both the SAB82532
and the Z8530 drivers used the I/O address as a quick and dirty way to
determine which channel they operated on, but formalizing this by
introducing iobase is not a solution. How for example would a driver
know which channel it controls for a multi-channel UART that only has a
single I/O range?

Instead, add an explicit field, called chan, to struct uart_bas that
holds the channel within a device, or 0 otherwise. The chan field is
initialized both by the system device probing (i.e. a system console)
or it is passed down to uart_bus_probe() by any of the bus front-ends.
As such, it impacts all platforms and bus drivers and makes it a rather
large commit.

Remove the use of iobase in uart_cpu_eqres() for pc98. It is expected
that platforms have the capability to compare tag and handle pairs for
equality; as to determine whether two pairs access the same device or
not. The use of iobase for pc98 makes it impossible to formalize this
and turn it into a real newbus function later. This commit reverts
uart_cpu_eqres() for pc98 to an unimplemented function. It has to be
reimplemented using only the tag and handle fields in struct uart_bas.

Rewrite the SAB82532 and Z8530 drivers to use the chan field in struct
uart_bas. Remove the IS_CHANNEL_A and IS_CHANNEL_B macros. We don't
need to abstract anything anymore.

Discussed with: nyan
Tested on: i386, ia64, sparc64

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