Add experimental support for SATA Port Multipliers

Support is working on the Silicon Image SiI3124/3132.
Support is working on some AHCI chips but far from all.

Remember this is WIP, so test report

Add experimental support for SATA Port Multipliers

Support is working on the Silicon Image SiI3124/3132.
Support is working on some AHCI chips but far from all.

Remember this is WIP, so test reports and (constructive) suggestions are welcome!

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Implement a workaround of the datacorruption problem on serverworks HT1000 chipsets.
The HT1000 DMA engine seems to not always like 64K transfers and sometimes barfs data all over memory leading to i

Implement a workaround of the datacorruption problem on serverworks HT1000 chipsets.
The HT1000 DMA engine seems to not always like 64K transfers and sometimes barfs data all over memory leading to instant chrash and burn.
Also fix 48bit adressing issues, apparently newer chips needs 16bit writes and not the usual fifo thing.

HW donated by: Travis Mikalson at TerraNovaNet

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Fix KASSERT messages.

Try to workaound silicon bugs in Promise gen2 (ie TX4) chips

Initial patch by Alexander Sabourenkov who found it in Promise's own driver.

Further fixes and sanity checks by yours truely.

OK, this is not my day, fix the former fix :/

Hopefully unbreak the 64bit DMA support this time.

Dont zero out 64BIT flag on DMA ops.

Add support for 64bit addressing to AHCI and Marvell controllers.
Munged into ATA shape and Marvell specifics my yours truely.

Submitted by: jhb

Update copyright headers.

add a newbus method for obtaining the bus's bus_dma_tag_t... This is
required by arches like sparc64 (not yet implemented) and sun4v where there
are seperate IOMMU's for each PCI bus... For all oth

add a newbus method for obtaining the bus's bus_dma_tag_t... This is
required by arches like sparc64 (not yet implemented) and sun4v where there
are seperate IOMMU's for each PCI bus... For all other arches, it will
end up returning NULL, which makes it a no-op...

Convert a few drivers (the ones we've been working w/ on sun4v) to the
new convection... Eventually all drivers will need to replace the parent
tag of NULL, w/ bus_get_dma_tag(dev), though dev is usually different for
each driver, and will require hand inspection...

Reviewed by: scottl (earlier version)

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Get rid of the advertising clause in the copyright.

Dont use the BUS_DMA_ALLOCNOW flag. Instead use BUS_DMA_NOWAIT and return
ENOMEM to the upper layers if we run out of memory.

This solves part of the trouble with running on >4GB memory systems.

Normalize a significant number of kernel malloc type names:

- Prefer '_' to ' ', as it results in more easily parsed results in
memory monitoring tools such as vmstat.

- Remove punctuation that i

Normalize a significant number of kernel malloc type names:

- Prefer '_' to ' ', as it results in more easily parsed results in
memory monitoring tools such as vmstat.

- Remove punctuation that is incompatible with using memory type names
as file names, such as '/' characters.

- Disambiguate some collisions by adding subsystem prefixes to some
memory types.

- Generally prefer lower case to upper case.

- If the same type is defined in multiple architecture directories,
attempt to use the same name in additional cases.

Not all instances were caught in this change, so more work is required to
finish this conversion. Similar changes are required for UMA zone names.

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Add support for setting the SG list segment size.
Use this for the SiI3112 workaround to get rid of the "oversized DMA" errors.

MFC to 6.0 candidate.

Reshape the dma code to be a bit more flexible so it can cope with
new HW that has new and different demands.
Fix a few nits in former commit in this cleanup crusade.

Sponsored by: pair.com

Update on the last commit, the dma* funciton needs to be called with
a channel device, not an ata device, or we'll be out of luck in
reset/timeout where we dont have a device.

Take newbusification one step further, ie use the device_t more consequently
all way through the code down the layers, instead of the mix'n'match that
resulted from the conversion done earlier.

Spon

Take newbusification one step further, ie use the device_t more consequently
all way through the code down the layers, instead of the mix'n'match that
resulted from the conversion done earlier.

Sponsored by: pair.com

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Put the BUS_DMASYNC_PREWRITE in the rigth position.

This is the much rumoured ATA mkIII update that I've been working on.

o ATA is now fully newbus'd and split into modules.
This means that on a modern system you just load "atapci and a

This is the much rumoured ATA mkIII update that I've been working on.

o ATA is now fully newbus'd and split into modules.
This means that on a modern system you just load "atapci and ata"
to get the base support, and then one or more of the device
subdrivers "atadisk atapicd atapifd atapist ataraid".
All can be loaded/unloaded anytime, but for obvious reasons you
dont want to unload atadisk when you have mounted filesystems.

o The device identify part of the probe has been rewritten to fix
the problems with odd devices the old had, and to try to remove
so of the long delays some HW could provoke. Also probing is done
without the need for interrupts, making earlier probing possible.

o SATA devices can be hot inserted/removed and devices will be created/
removed in /dev accordingly.
NOTE: only supported on controllers that has this feature:
Promise and Silicon Image for now.
On other controllers the usual atacontrol detach/attach dance is
still needed.

o Support for "atomic" composite ATA requests used for RAID.

o ATA RAID support has been rewritten and and now supports these
metadata formats:
"Adaptec HostRAID"
"Highpoint V2 RocketRAID"
"Highpoint V3 RocketRAID"
"Intel MatrixRAID"
"Integrated Technology Express"
"LSILogic V2 MegaRAID"
"LSILogic V3 MegaRAID"
"Promise FastTrak"
"Silicon Image Medley"
"FreeBSD PseudoRAID"

o Update the ioctl API to match new RAID levels etc.

o Update atacontrol to know about the new RAID levels etc
NOTE: you need to recompile atacontrol with the new sys/ata.h,
make world will take care of that.
NOTE2: that rebuild is done differently from the old system as
the rebuild is now done piggybacked on read requests to the
array, so atacontrol simply starts a background "dd" to rebuild
the array.

o The reinit code has been worked over to be much more robust.

o The timeout code has been overhauled for races.

o Support of new chipsets.

o Lots of fixes for bugs found while doing the modulerization and
reviewing the old code.

Missing or changed features from current ATA:

o atapi-cd no longer has support for ATAPI changers. Todays its
much cheaper and alot faster to copy those CD images to disk
and serve them from there. Besides they dont seem to be made
anymore, maybe for that exact reason.

o ATA RAID can only read metadata from all the above metadata formats,
not write all of them (Promise and Highpoint V2 so far). This means
that arrays can be picked up from the BIOS, but they cannot be
created from FreeBSD. There is more to it than just the missing
write metadata support, those formats are not unique to a given
controller like Promise and Highpoint formats, instead they exist
for several types, and even worse, some controllers can have
different formats and its impossible to tell which one.
The outcome is that we cannot reliably create the metadata of those
formats and be sure the controller BIOS will understand it.
However write support is needed to update/fail/rebuild the arrays
properly so it sits fairly high on the TODO list.

o So far atapicam is not supported with these changes. When/if this
will change is up to the maintainer of atapi-cam so go there for
questions.

HW donated by: Webveveriet AS
HW donated by: Frode Nordahl
HW donated by: Yahoo!
HW donated by: Sentex
Patience by: Vife and my boys (and even the cats)

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Don't set the BUS_DMA_ALLOCNOW flag for the parent tag or the tags that are
used for static memory allocations.

Discussed with: sos

Reduce the amount of memory reported to busdma.
This made the requirements for bouncebuffers too big with PAE.
Cleanup the way size defines for transfers are implemented.

Correct the args to busdma, mostly cosmetic.

Allow the use of a supplied function to set the PRD table. This is
needed for new chips that supports 64bit addressing.

Change the order of ata_dmainit/ata_allocate in preparation of
supporting new chipsets where this is needed.

Try to narrow down the race window on HW that does not have ways to
poll for which channel actually pulled the irq line.