Convert the SMP_TSC kernel option into a loader tunable. Also enable
the TSC timecounter on single-CPU systems even when they are running
an SMP kernel.

Add SMP_TSC option, which can be used on SMP systems where the TSCs
are synchronized to reduce context switch cost.

Commit a partial lazy thread switch mechanism for i386. it isn't as lazy
as it could be and can do with some more cleanup. Currently its under
options LAZY_SWITCH. What this does is avoid %cr3 rel

Commit a partial lazy thread switch mechanism for i386. it isn't as lazy
as it could be and can do with some more cleanup. Currently its under
options LAZY_SWITCH. What this does is avoid %cr3 reloads for short
context switches that do not involve another user process. ie: we can
take an interrupt, switch to a kthread and return to the user without
explicitly flushing the tlb. However, this isn't as exciting as it could
be, the interrupt overhead is still high and too much blocks on Giant
still. There are some debug sysctls, for stats and for an on/off switch.

The main problem with doing this has been "what if the process that you're
running on exits while we're borrowing its address space?" - in this case
we use an IPI to give it a kick when we're about to reclaim the pmap.

Its not compiled in unless you add the LAZY_SWITCH option. I want to fix a
few more things and get some more feedback before turning it on by default.

This is NOT a replacement for Bosko's lazy interrupt stuff. This was more
meant for the kthread case, while his was for interrupts. Mine helps a
little for interrupts, but his helps a lot more.

The stats are enabled with options SWTCH_OPTIM_STATS - this has been a
pseudo-option for years, I just added a bunch of stuff to it.

One non-trivial change was to select a new thread before calling
cpu_switch() in the first place. This allows us to catch the silly
case of doing a cpu_switch() to the current process. This happens
uncomfortably often. This simplifies a bit of the asm code in cpu_switch
(no longer have to call choosethread() in the middle). This has been
implemented on i386 and (thanks to jake) sparc64. The others will come
soon. This is actually seperate to the lazy switch stuff.

Glanced at by: jake, jhb

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- Add support for PAE and more than 4 gigs of ram on x86, dependent on the
kernel opition 'options PAE'. This will only work with device drivers which
either use busdma, or are able to handle 64

- Add support for PAE and more than 4 gigs of ram on x86, dependent on the
kernel opition 'options PAE'. This will only work with device drivers which
either use busdma, or are able to handle 64 bit physical addresses.

Thanks to Lanny Baron from FreeBSD Systems for the loan of a test machine
with 6 gigs of ram.

Sponsored by: DARPA, Network Associates Laboratories, FreeBSD Systems

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Nuke options HTT infavor of machdep.hlt_logical_cpus tunable/sysctl.
This keeps the logical cpu's halted in the idle loop. By default
the logical cpu's are halted at startup. It is also possible to

Nuke options HTT infavor of machdep.hlt_logical_cpus tunable/sysctl.
This keeps the logical cpu's halted in the idle loop. By default
the logical cpu's are halted at startup. It is also possible to
halt any cpu in the idle loop now using machdep.hlt_cpus.

Examples of how to use this:
machdep.hlt_cpus=1 halt cpu0
machdep.hlt_cpus=2 halt cpu1
machdep.hlt_cpus=4 halt cpu2
machdep.hlt_cpus=3 halt cpu0,cpu1

Reviewed by: jhb, peter

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Wrap the hyperthreading support code with the HTT kernel option.
Hyperthreading support is now off unless the HTT option is added.

MFC-after: 3 days

Add machdep.elan_freq sysctl which can be used to set the CPU clock
frequency in Hz. The default is still 33.333 MHz. Please notice
that the number is round to a multiple of four internally so it m

Add machdep.elan_freq sysctl which can be used to set the CPU clock
frequency in Hz. The default is still 33.333 MHz. Please notice
that the number is round to a multiple of four internally so it may
not read back exactly the same as written.

Add compile time ELAN_XTAL option to override the 33.333 MHz default.

Add compile time ELAN_PPS option to enable code for high precision
(250 nanoseconds) timestamping of external signals.

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Move SHOW_BUSYBUFS and PANIC_REBOOT_WAIT_TIME into the MI options file, since
MI code uses them, and every platform provides them (except x86_64 whose
options file was lacking one).

Reviewed by: bde

Move SHOW_BUSYBUFS and PANIC_REBOOT_WAIT_TIME into the MI options file, since
MI code uses them, and every platform provides them (except x86_64 whose
options file was lacking one).

Reviewed by: bde, rwatson

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Add new syscons option SC_NO_SUSPEND_VTYSWITCH.
This disables vty switch during suspend/resume.

Add a knob to turn on and off the CMPXCHG instruction on > i386 IA32 systems.
This is most beneficial for vmware client os installs.

Reviewed by: jmallet, iedowse, tlambert2@mindspring.com
MFC After

Add a knob to turn on and off the CMPXCHG instruction on > i386 IA32 systems.
This is most beneficial for vmware client os installs.

Reviewed by: jmallet, iedowse, tlambert2@mindspring.com
MFC After: never, -STABLE does not currently use this instruction

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Move the KSTACK_PAGES option from MD to MI. Although not all platforms
support this, we do have MI code that references it and is otherwise
unaware of an override. The alternative is to put knowled

Move the KSTACK_PAGES option from MD to MI. Although not all platforms
support this, we do have MI code that references it and is otherwise
unaware of an override. The alternative is to put knowledge in these
MI files about which platforms have the opt_kstack_pages.h option file.
It is more likely that other platforms will gain the ability to tune the
kstack size.

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Automatically enable CPU_ENABLE_SSE (detect and enable SSE instructions)
if compiling with I686_CPU as a target. CPU_DISABLE_SSE will prevent
this from happening and will guarantee the code is not c

Automatically enable CPU_ENABLE_SSE (detect and enable SSE instructions)
if compiling with I686_CPU as a target. CPU_DISABLE_SSE will prevent
this from happening and will guarantee the code is not compiled in.

I am still not happy with this, but gcc is now generating code that uses
these instructions if you set CPUTYPE to p3/p4 or athlon-4/mp/xp or higher.

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Add COMPAT_AOUT option so that config will not yell when you try and
compile it statically.

Change the support for AMDs ElanSC520 CPU from being a device driver to
be
options CPU_ELAN
(NB: Soekris.com users!)

It is cleaner this way. We still recognize the cpu on the host-pci bridge.

Move SMBFS from i386 and pc98 files and options files to MI files and
options files.

The puc(4) driver/bridge is MI, so don't bury it in MD options and files
config files. It also depends on PCI.

Make WLCACHE and WLDEBUG MI options.

Make NDGBPORTS an MI option since the dgb(4) driver is an MI driver.
Remove comments about NDGBPORTS from the options* files. Please document
options in NOTES, not in the options* files.

Revive backed out pmap related changes from Feb 2002. The highlights are:
- It actually works this time, honest!
- Fine grained TLB shootdowns for SMP on i386. IPI's are very expensive,
so try an

Revive backed out pmap related changes from Feb 2002. The highlights are:
- It actually works this time, honest!
- Fine grained TLB shootdowns for SMP on i386. IPI's are very expensive,
so try and optimize things where possible.
- Introduce ranged shootdowns that can be done as a single IPI.
- PG_G support for i386
- Specific-cpu targeted shootdowns. For example, there is no sense in
globally purging the TLB cache for where we are stealing a page from
the local unshared process on the local cpu. Use pm_active to track
this.
- Add some instrumentation for the tlb shootdown code.
- Rip out SMP code from <machine/cpufunc.h>
- Try and fix some very bogus PG_G and PG_PS interactions that were bad
enough to cause vm86 bios calls to break. vm86 depended on our existing
bugs and this was the cause of the VESA panics last time.
- Fix the silly one-line error that caused the 'panic: bad pte' last time.
- Fix a couple of other silly one-line errors that should have caused more
pain than they did.

Some more work is needed:
- pmap_{zero,copy}_page[_idle]. These can be done without IPI's if we
have a hook in cpu_switch.
- The IPI handlers need some cleanup. I have a bogus %ds load that can
be avoided.
- APTD handling is rather bogus and appears to be a large source of
global TLB IPI shootdowns for no really good reason.

I see speedups of between 1.5% and ~4% on buildworlds in a while 1 loop.
I expect to see a bigger difference when there is significant pageout
activity or the system otherwise has memory shortages.

I have backed out a few optimizations that I had been using over the last
few days in order to be a little more conservative. I'll revisit these
again over the next few days as the dust settles.

New option: DISABLE_PG_G - In case I missed something.

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Make the speed used by gdb over serial settable in the kernel configuration.

This facilitates the use in circumstances where you are using a serial
console as well. GDB doesn't support anything high

Make the speed used by gdb over serial settable in the kernel configuration.

This facilitates the use in circumstances where you are using a serial
console as well. GDB doesn't support anything higher than 9600 baud (19k2
if you are lucky), but the console does.

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More s/file system/filesystem/g

Back out all the pmap related stuff I've touched over the last few days.
There is some unresolved badness that has been eluding me, particularly
affecting uniprocessor kernels. Turning off PG_G help

Back out all the pmap related stuff I've touched over the last few days.
There is some unresolved badness that has been eluding me, particularly
affecting uniprocessor kernels. Turning off PG_G helped (which is a bad
sign) but didn't solve it entirely. Userland programs still crashed.

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Work-in-progress commit syncing up pmap cleanups that I have been working
on for a while:
- fine grained TLB shootdown for SMP on i386
- ranged TLB shootdowns.. eg: specify a range of pages to shoot

Work-in-progress commit syncing up pmap cleanups that I have been working
on for a while:
- fine grained TLB shootdown for SMP on i386
- ranged TLB shootdowns.. eg: specify a range of pages to shoot down with
a single IPI, since the IPI is very expensive. Adjust some callers
that used to trigger this inside tight loops to do a ranged shootdown
at the end instead.
- PG_G support for SMP on i386 (options ENABLE_PG_G)
- defer PG_G activation till after we decide what we are going to do with
PSE and the 4MB pages at the start of the kernel. This should solve
some rumored strangeness about stale PG_G entries getting stuck
underneath the 4MB pages.
- add some instrumentation for the fine TLB shootdown
- convert some asm instruction wrappers from functions to inlines. gcc
seems to do a fair bit better with this.
- [temporarily!] pessimize the tlb shootdown IPI handlers. I will fix
this again shortly.

This has been working fairly well for me for a while, but I have tweaked
it again prior to commit since my last major testing round. The only
outstanding problem that I know of is PG_G related, which is why there
is an option for it (not on by default for SMP). I have seen a world
speedups by a few percent (as much as 4 or 5% in one case) but I have
*not* accurately measured this - I am a bit sceptical of these numbers.

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Add the puc (PCI "Universal" Communications) driver. The idea and some of
the structure definitions come from NetBSD to make it easier to share card
definitions. The driver only acts as a shim betwee

Add the puc (PCI "Universal" Communications) driver. The idea and some of
the structure definitions come from NetBSD to make it easier to share card
definitions. The driver only acts as a shim between the pci bus and the
sio driver. Later pci parallel ports could also be supported through this
driver. Support for most single and multiport pci serial cards should be
as simple as adding its definition to pucdata.c

Tested with the following pci cards:
Moxa Industio CP-114, 4 port RS-232,RS-422/485
Syba Tech Ltd. PCI-4S2P-550-ECP, 4 port RS-232 + 2 parallel ports
Netmos NM9835 PCI-2S-550, 2 port RS-232

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Garbage collect options AVM_A1_PCI, AVM_A1_PCMCIA, DEBUG_LINUX, DEV_APM,
GUS_DMA, GUS_DMA2, GUS_IRQ, OLTR_NO_BULLSEYE_MAC, OLTR_NO_HAWKEYE_MAC,
OLTR_NO_TMS_MAC and PCIC_RESUME_RESET.