Merge i.MX and PowerPC SDHCI drivers

Summary:
i.MX5 and PowerPC use a very similar eSDHC controller, which is also
similar to the uSDHC controller used by i.MX6. The imx_sdhci driver works
almost c

Merge i.MX and PowerPC SDHCI drivers

Summary:
i.MX5 and PowerPC use a very similar eSDHC controller, which is also
similar to the uSDHC controller used by i.MX6. The imx_sdhci driver works
almost completely with PowerPC, with some minor tweaks.

There is one caveat with this: reset currently does not work on PowerPC, so has
been #ifdef'd out until this can be tracked down and fixed. If resets are done
the controller will timeout all data transactions. Without a reset, it appears
to work just fine.

This is part 3, following up r308186 and r308187.

Test Plan:
This has been tested on a PowerPC QorIQ P1022 board. It has not been
tested on i.MX, but no regressions are expected.

Reviewed By: imp
Differential Revision: https://reviews.freebsd.org/D8407

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Merge ^/head r307736 through r308146.

Create a new MACHINE_ARCH for Freescale PowerPC e500v2

Summary:
The Freescale e500v2 PowerPC core does not use a standard FPU.
Instead, it uses a Signal Processing Engine (SPE)--a DSP-style vector p

Create a new MACHINE_ARCH for Freescale PowerPC e500v2

Summary:
The Freescale e500v2 PowerPC core does not use a standard FPU.
Instead, it uses a Signal Processing Engine (SPE)--a DSP-style vector processor
unit, which doubles as a FPU. The PowerPC SPE ABI is incompatible with the
stock powerpc ABI, so a new MACHINE_ARCH was created to deal with this.
Additionaly, the SPE opcodes overlap with Altivec, so these are mutually
exclusive. Taking advantage of this fact, a new file, powerpc/booke/spe.c, was
created with the same function set as in powerpc/powerpc/altivec.c, so it
becomes effectively a drop-in replacement. setjmp/longjmp were modified to save
the upper 32-bits of the now-64-bit GPRs (upper 32-bits are only accessible by
the SPE).

Note: This does _not_ support the SPE in the e500v1, as the e500v1 SPE does not
support double-precision floating point.

Also, without a new MACHINE_ARCH it would be impossible to provide binary
packages which utilize the SPE.

Additionally, no work has been done to support ports, work is needed for this.
This also means no newer gcc can yet be used. However, gcc's powerpc support
has been refactored which would make adding a powerpcspe-freebsd target very
easy.

Test Plan:
This was lightly tested on a RouterBoard RB800 and an AmigaOne A1222
(P1022-based) board, compiled against the new ABI. Base system utilities
(/bin/sh, /bin/ls, etc) still function appropriately, the system is able to boot
multiuser.

Reviewed By: bdrewery, imp
Relnotes: yes
Differential Revision: https://reviews.freebsd.org/D5683

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Merge ^/head r306303 through 306411.

Add NXP/Freescale DIU driver for PowerPC SoCs

Summary:
This enables some features of the DIU, using a static configuration,
specified either via a 'edid' property on the 'display' FDT node, or a
'vi

Add NXP/Freescale DIU driver for PowerPC SoCs

Summary:
This enables some features of the DIU, using a static configuration,
specified either via a 'edid' property on the 'display' FDT node, or a
'video-mode' environment variable (bootarg). 'video-mode' was chosen because it
matches u-boot's naming, so it can be set with:

setenv bootargs video-mode=${video-mode}

at the u-boot CLI.

Mouse cursor is not supported currently, as a hardware cursor is not supported
by framebuffer VT yet. Currently it only supports a 32bpp ARGB (actually BGRA)
format, and only a single composite plane, at up to 1280x1024.

Differential Revision: https://reviews.freebsd.org/D8022

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Merge ^/head r303250 through r304235.

Merge MPC85XX and QorIQ config options

Summary:
MPC85XX and QorIQ are very similar. When the DPAA dTSEC driver was
added, QORIQ_DPAA was brought in as a config option to support the differences
in

Merge MPC85XX and QorIQ config options

Summary:
MPC85XX and QorIQ are very similar. When the DPAA dTSEC driver was
added, QORIQ_DPAA was brought in as a config option to support the differences
in hardware register settings between QorIQ (e500mc-, e5500- based) SoCs and
QUICC (e500v1/e500v2-based) SoCs, particularly in the Local Access Window (LAW)
target settings.

Unify these settings using macros to hide details and ease porting, and use a
new function (mpc85xx_is_qoriq()) to distinguish between QorIQ and QUICC SoCs at
runtime.

An alternative to using the function could be to use a variable initialized at
platform attach time, which may incur less overhead at runtime. Since it's not
in the critical path once booted, this optimization doesn't seem necessary at
first pass.

Reviewed by: nwhitehorn
MFC after: 1 week
Differential Revision: https://reviews.freebsd.org/D7294

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Move the OFW iicbus code to dev/iicbus to stop polluting dev/ofw with
unrelated code.

Discussed with: nwhitehorn (a long time ago)

MFH

Sponsored by: The FreeBSD Foundation

Fix PowerPC LINT build after r297392

PowerPC has real Open Firmware and does not necessarily need FDT.
Make ofwpci.c only PCI dependent.

Pointed out by: emaste
Reviewed by: nwhitehorn
Obtained from

Fix PowerPC LINT build after r297392

PowerPC has real Open Firmware and does not necessarily need FDT.
Make ofwpci.c only PCI dependent.

Pointed out by: emaste
Reviewed by: nwhitehorn
Obtained from: Semihalf

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Reduce OFW PCI code duplication - involves ARM, PPC and SPARC64

Import portions of the PowerPC OF PCI implementation into new file
"ofwpci.c", common for other platforms. The files ofw_pci.c and ofw

Reduce OFW PCI code duplication - involves ARM, PPC and SPARC64

Import portions of the PowerPC OF PCI implementation into new file
"ofwpci.c", common for other platforms. The files ofw_pci.c and ofw_pci.h
from sys/powerpc/ofw no longer exist. All required declarations are moved
to sys/dev/ofw/ofwpci.h. This creates a new ofw_pci_write_ivar() function
and modifies some others methods. Most functions contain existing ppc
implementations in the majority unchanged. Now there is no need to have
multiple identical copies of methods for various architectures.

Requested by: jhibbits
Reviewed by: jhibbits, marius
Submitted by: Marcin Mazurek <mma@semihalf.com>
Obtained from: Semihalf
Sponsored by: Annapurna Labs
Differential Revision: https://reviews.freebsd.org/D4879

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MFH r289384-r293170

Sponsored by: The FreeBSD Foundation

MFH @r292599

This includes the pluggable TCP framework and other chnages to the
netstack to track for VNET stability.

Security: The FreeBSD Foundation

Implement OF_decode_addr() for arm. Move most of powerpc's implementation
into a new function that other platforms can share.

This creates a new ofw_reg_to_paddr() function (in a new ofw_subr.c fil

Implement OF_decode_addr() for arm. Move most of powerpc's implementation
into a new function that other platforms can share.

This creates a new ofw_reg_to_paddr() function (in a new ofw_subr.c file)
that contains most of the existing ppc implementation, mostly unchanged.
The ppc code now calls the new MI code from the MD code, then creates a
ppc-specific bus_space mapping from the results. The new arm implementation
does the same in an arm-specific way.

This also moves the declaration of OF_decode_addr() from ofw_machdep.h to
openfirm.h, except on sparc64 which uses a different function signature.

This will help all FDT platforms to set up early console access using
OF_decode_addr().

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Catch up with head.

Add Freescale QorIQ GPIO driver.

Still missing interrupt support, to come later.

Sponsored by: Alex Perez/Inertial Computing

Catch up with head (r291075).

Add support for new LAW registers in QorIQ SoCs.

QorIQ SoCs (e5500 core, P5 family) have 2 BARs for local access windows, while
MPC85XX, and P1/P2 families use only a single BAR register.

This also

Add support for new LAW registers in QorIQ SoCs.

QorIQ SoCs (e5500 core, P5 family) have 2 BARs for local access windows, while
MPC85XX, and P1/P2 families use only a single BAR register.

This also adds the QORIQ_DPAA option, mutually exclusive to MPC85XX, to handle
this difference.

Obtained from: Semihalf
Sponsored by: Alex Perez/Inertial Computing

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Merge from head

Merge from head

Sponsored by: Gandi.net

Add libkern ffsll() for parity with flsll()

Sponsored by: EMC / Isilon Storage Division
Differential Revision: https://reviews.freebsd.org/D3962

Merge from head

Merge from head

Sync up with head (up to r288341).

Merge ^/head r288035 through r288099.