Revision tags: release/11.0.1, release/11.0.0 |
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27067774 |
| 16-Aug-2016 |
Dimitry Andric <dim@FreeBSD.org> |
Merge ^/head r303250 through r304235.
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532c3cde |
| 16-Aug-2016 |
Enji Cooper <ngie@FreeBSD.org> |
MFhead @ r304232
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2bafd72f |
| 15-Aug-2016 |
Andrew Turner <andrew@FreeBSD.org> |
Add the ARMv8.1 identification registers to the list we print when booting.
MFC after: 1 week Sponsored by: ABT Systems Ltd
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49a92cd4 |
| 01-Aug-2016 |
Andrew Turner <andrew@FreeBSD.org> |
Add the fields for the PAR_EL1 register. This is used when performing an address lookup with the AT instructions.
Obtained from: ABT Systems Ltd MFC after: 1 month Sponsored by: The FreeBSD Foundati
Add the fields for the PAR_EL1 register. This is used when performing an address lookup with the AT instructions.
Obtained from: ABT Systems Ltd MFC after: 1 month Sponsored by: The FreeBSD Foundation
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63512a12 |
| 31-Jul-2016 |
Andrew Turner <andrew@FreeBSD.org> |
Add the Data Fault Status Code values to the ESR_ELx registers for when the fault code is a Data Abort.
Obtained from: AT Systems Ltd MFC after: 1 month Sponsored by: The FreeBSD Foundation
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d6084013 |
| 05-Apr-2016 |
Glen Barber <gjb@FreeBSD.org> |
MFH
Sponsored by: The FreeBSD Foundation
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db278182 |
| 04-Apr-2016 |
Wojciech Macek <wma@FreeBSD.org> |
arm64: bzero optimization
This optimization attempts to utylize as wide as possible register store instructions to zero large buffers. The implementation, if possible, will use 'dc zva' to zero buff
arm64: bzero optimization
This optimization attempts to utylize as wide as possible register store instructions to zero large buffers. The implementation, if possible, will use 'dc zva' to zero buffer by cache lines.
Speedup: 60x faster memory zeroing
Submitted by: Dominik Ermel <der@semihalf.com> Obtained from: Semihalf Sponsored by: Cavium Reviewed by: kib Differential Revision: https://reviews.freebsd.org/D5726
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Revision tags: release/10.3.0 |
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82aa34e6 |
| 04-Mar-2016 |
Dimitry Andric <dim@FreeBSD.org> |
Merge ^/head r296007 through r296368.
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52259a98 |
| 02-Mar-2016 |
Glen Barber <gjb@FreeBSD.org> |
MFH
Sponsored by: The FreeBSD Foundation
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b2552c46 |
| 01-Mar-2016 |
Wojciech Macek <wma@FreeBSD.org> |
Enable SRE_EL2 on ARM64
Enable system register access for EL2. Alpine-V2 is the first device requiring this to be enabled. It is also in-sync with Linux initialization code, and compatible with Alpi
Enable SRE_EL2 on ARM64
Enable system register access for EL2. Alpine-V2 is the first device requiring this to be enabled. It is also in-sync with Linux initialization code, and compatible with Alpine-V2 uboot requirements.
Obtained from: Semihalf Submitted by: Michal Stanek <mst@semihalf.com> Sponsored by: Annapurna Labs Approved by: cognet (mentor) Reviewed by: wma Differential revision: https://reviews.freebsd.org/D5394
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0fe0fe11 |
| 15-Feb-2016 |
Glen Barber <gjb@FreeBSD.org> |
MFH
Sponsored by: The FreeBSD Foundation
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4156ce4f |
| 11-Feb-2016 |
Dimitry Andric <dim@FreeBSD.org> |
Merge ^/head r295351 through r295543.
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8133eda9 |
| 11-Feb-2016 |
Zbigniew Bodek <zbb@FreeBSD.org> |
Minor clean-ups for ARM64 GICv3 and GIC drivers
GICv3: - move ICC_SGI1R_EL1 definitions to armreg.h and use proper system register's names GIC: - remove unused functions
Reviewed by: andrew Obt
Minor clean-ups for ARM64 GICv3 and GIC drivers
GICv3: - move ICC_SGI1R_EL1 definitions to armreg.h and use proper system register's names GIC: - remove unused functions
Reviewed by: andrew Obtained from: Semihalf Sponsored by: Cavium Differential Revision: https://reviews.freebsd.org/D5119
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a49d8b6e |
| 06-Feb-2016 |
Dimitry Andric <dim@FreeBSD.org> |
Merge ^/head r294961 through r295350.
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2414e864 |
| 03-Feb-2016 |
Bjoern A. Zeeb <bz@FreeBSD.org> |
MfH @r295202
Expect to see panics in routing code at least now.
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221b3499 |
| 02-Feb-2016 |
Glen Barber <gjb@FreeBSD.org> |
MFH
Sponsored by: The FreeBSD Foundation
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87e19994 |
| 02-Feb-2016 |
Andrew Turner <andrew@FreeBSD.org> |
Implement single stepping on arm64. We need to set the single step bits in the processor and debug state registers. A flag has been added to the pcb to tell us when to enable single stepping for a gi
Implement single stepping on arm64. We need to set the single step bits in the processor and debug state registers. A flag has been added to the pcb to tell us when to enable single stepping for a given thread.
Reviewed by: kib Sponsored by: ABT Systems Ltd Differential Revision: https://reviews.freebsd.org/D4730
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c8296cbb |
| 29-Jan-2016 |
Glen Barber <gjb@FreeBSD.org> |
MFH
Sponsored by: The FreeBSD Foundation
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8a1867f4 |
| 29-Jan-2016 |
Wojciech Macek <wma@FreeBSD.org> |
Framework for ARM64 instruction disassembler
Provide an easy to use framework for ARM64 DDB disassembler. This commit does not contain full list of instruction opcodes.
Obtained from:
Framework for ARM64 instruction disassembler
Provide an easy to use framework for ARM64 DDB disassembler. This commit does not contain full list of instruction opcodes.
Obtained from: Semihalf Sponsored by: Cavium Approved by: cognet (mentor) Reviewed by: zbb, andrew, cognet Differential revision: https://reviews.freebsd.org/D5114
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009e81b1 |
| 22-Jan-2016 |
Bjoern A. Zeeb <bz@FreeBSD.org> |
MFH @r294567
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b626f5a7 |
| 04-Jan-2016 |
Glen Barber <gjb@FreeBSD.org> |
MFH r289384-r293170
Sponsored by: The FreeBSD Foundation
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8c490985 |
| 31-Dec-2015 |
Dimitry Andric <dim@FreeBSD.org> |
Merge ^/head r292951 through r293015.
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5f0a5fef |
| 30-Dec-2015 |
Andrew Turner <andrew@FreeBSD.org> |
Decode and print the ID_AA64* registers on boot. These registers hold information on what the core supports. In most cases these will be identical across most CPUs in the SoC, however there may be th
Decode and print the ID_AA64* registers on boot. These registers hold information on what the core supports. In most cases these will be identical across most CPUs in the SoC, however there may be the case where, with a big.LITTLE setup they may differ. In this case we print the decoded data on all CPUs.
Reviewed by: kib Sponsored by: ABT Systems Ltd Differential Revision: https://reviews.freebsd.org/D4725
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a5d8944a |
| 19-Nov-2015 |
Navdeep Parhar <np@FreeBSD.org> |
Catch up with head (r291075).
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3c3feed4 |
| 01-Nov-2015 |
Baptiste Daroussin <bapt@FreeBSD.org> |
Merge from head
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