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7757a1b4 |
| 03-May-2015 |
Baptiste Daroussin <bapt@FreeBSD.org> |
Merge from head
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de7df74b |
| 01-May-2015 |
Glen Barber <gjb@FreeBSD.org> |
MFH: r281855-r282312
Sponsored by: The FreeBSD Foundation
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b7fbc369 |
| 22-Apr-2015 |
Luiz Otavio O Souza <loos@FreeBSD.org> |
Fetch the SDHCI frequency from videocore (our prefered source) and only if it fails, fetch the clock-frequency from DTB.
If both methods fail, use the hardcoded default.
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4bf53d0b |
| 04-Apr-2015 |
Baptiste Daroussin <bapt@FreeBSD.org> |
Merge from HEAD
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e6e746bf |
| 25-Mar-2015 |
Glen Barber <gjb@FreeBSD.org> |
MFH: r278968-r280640
Sponsored by: The FreeBSD Foundation
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33a00de2 |
| 25-Mar-2015 |
Andrew Turner <andrew@FreeBSD.org> |
Remove a debug #error from the bcm2835 sdhci driver.
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4e46a66e |
| 25-Mar-2015 |
Andrew Turner <andrew@FreeBSD.org> |
Add support for the Raspberry Pi 2. As the chip is based on the bcm2835 in the Raspberry Pi B we support most of the devices are already supported, however the base address has changed.
A few items
Add support for the Raspberry Pi 2. As the chip is based on the bcm2835 in the Raspberry Pi B we support most of the devices are already supported, however the base address has changed.
A few items are not working, or missing. The main ones are: * DMA doesn't work in the sdhci driver. * Enabling vchiq halts the boot, may be interrupt related. * There is no U-Boot port yet so the DTB is embedded in the kernel.
The last point will make it difficult to boot FreeBSD, however there is support for the Raspberry Pi 2 in the U-Boot git repo. As I have not tested this it is left as an open task to create a port to build.
X-MFC: When the above issues are fixed Sponsored by: ABT Systems Ltd
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27eb3304 |
| 20-Mar-2015 |
Andrew Turner <andrew@FreeBSD.org> |
Add a helper function to read clock frequencies from videocore and use this to get the default frequency of the sdhci device.
While here use a u_int to hold the frequency as it may be too large to f
Add a helper function to read clock frequencies from videocore and use this to get the default frequency of the sdhci device.
While here use a u_int to hold the frequency as it may be too large to fit in a 32-bit signed integer. This is the case when we have a 250MHz clock.
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53f2fbca |
| 11-Feb-2015 |
Glen Barber <gjb@FreeBSD.org> |
MFH: r278202,r278205-r278590
Sponsored by: The FreeBSD Foundation
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9f3d45b6 |
| 08-Feb-2015 |
Baptiste Daroussin <bapt@FreeBSD.org> |
Merge from HEAD
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a403ab7f |
| 04-Feb-2015 |
Dimitry Andric <dim@FreeBSD.org> |
Merge ^/head r278110 through r278223.
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d86f31b9 |
| 04-Feb-2015 |
Luiz Otavio O Souza <loos@FreeBSD.org> |
Remove stale comments about the issues with HS mode.
Remove a previous workaround to limit the minimum sdhci frequency that isn't needed anymore.
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07c7a520 |
| 04-Feb-2015 |
Luiz Otavio O Souza <loos@FreeBSD.org> |
Remove some duplicate calls to bus_release_resource() and destroy the mutex on error cases.
While here remove unnecessary includes.
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47712954 |
| 26-Jan-2015 |
Dimitry Andric <dim@FreeBSD.org> |
Merge ^/head r277327 through r277718.
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51dd214c |
| 19-Jan-2015 |
Enji Cooper <ngie@FreeBSD.org> |
MFhead @ r277403
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d899be7d |
| 19-Jan-2015 |
Glen Barber <gjb@FreeBSD.org> |
Reintegrate head: r274132-r277384
Sponsored by: The FreeBSD Foundation
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86ee58d9 |
| 18-Jan-2015 |
Ian Lepore <ian@FreeBSD.org> |
Save the command-and-flags value into the shadow register when it is written.
This doesn't actually change any behavior, because it just allows a 16-bit read of the command register to return the co
Save the command-and-flags value into the shadow register when it is written.
This doesn't actually change any behavior, because it just allows a 16-bit read of the command register to return the correct value, and nothing actually does a 16-bit read of that register.
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bba987dc |
| 17-Jan-2015 |
Ian Lepore <ian@FreeBSD.org> |
Add a new SDHCI quirk, SDHCI_QUIRK_DONT_SET_HISPD_BIT. Apparently some sdhci controllers, such as the one on a Raspberry Pi, mishandle the signal timing in high speed signaling mode, but run just fi
Add a new SDHCI quirk, SDHCI_QUIRK_DONT_SET_HISPD_BIT. Apparently some sdhci controllers, such as the one on a Raspberry Pi, mishandle the signal timing in high speed signaling mode, but run just fine in standard mode with the bus running at frequencies between 25-50MHz (which shouldn't work).
This is the solution adopted by U-Boot and other OSes (linux and *BSD) for the timeouts on Raspberry Pi boards with certain SD cards. Some research shows that this quirk is also used on a few other boards, so the fix is a generic quirk instead of being in the RPi-specific driver code.
This change is based on information discovered by Michal Meloun.
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8f0ea33f |
| 13-Jan-2015 |
Glen Barber <gjb@FreeBSD.org> |
Reintegrate head revisions r273096-r277147
Sponsored by: The FreeBSD Foundation
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244fe94f |
| 12-Jan-2015 |
Ian Lepore <ian@FreeBSD.org> |
Handle dma mappings with more than one segment for rpi sdhci.
The driver inherently does dma in 512 byte chunks, but it's possible that such a buffer can span two physically discontiguous pages (suc
Handle dma mappings with more than one segment for rpi sdhci.
The driver inherently does dma in 512 byte chunks, but it's possible that such a buffer can span two physically discontiguous pages (such as when a userland program does IO on the raw /dev/mmcsdN devices). Now the driver can handle a buffer that's split across two pages.
It could in theory handle any number of segments now, but as long as IO is being done in 512 byte blocks it will never need more than two.
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bf160401 |
| 11-Jan-2015 |
Ian Lepore <ian@FreeBSD.org> |
Check for and handle failures of bus_dmamap_load(). The driver currently requires that each 512 byte IO be in a single contiguous buffer, but if a buffer crosses a page boundary and the physical pag
Check for and handle failures of bus_dmamap_load(). The driver currently requires that each 512 byte IO be in a single contiguous buffer, but if a buffer crosses a page boundary and the physical pages aren't contiguous you can get an EFBIG failure (too many segments).
The driver really should handle multiple segment IO, but before adding that I wanted to make sure that it's handling failure properly while the failure is easily recreatable.
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bffed0e9 |
| 11-Jan-2015 |
Ian Lepore <ian@FreeBSD.org> |
Store the shadow command/mode register in the softc, not a local static var.
Submitted by: Michal Meloun
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4d56c133 |
| 21-Nov-2014 |
Alexander V. Chernikov <melifaro@FreeBSD.org> |
Sync to HEAD@r274766
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9268022b |
| 19-Nov-2014 |
Simon J. Gerraty <sjg@FreeBSD.org> |
Merge from head@274682
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bea71143 |
| 12-Nov-2014 |
Luiz Otavio O Souza <loos@FreeBSD.org> |
Since r273264 the SD card detection on Raspberry Pi is reliably working and that expose new bugs with HS mode.
When the old code could not do the proper card detection it would boot with lower defau
Since r273264 the SD card detection on Raspberry Pi is reliably working and that expose new bugs with HS mode.
When the old code could not do the proper card detection it would boot with lower defaults (and no HS mode) and this makes some HS cards boots.
Now, with the card always identified as HS capable, the sdhci controller tries to run the card at HS speeds and makes the boot always fail.
Disable the HS mode for now (which still can be enabled with the tunable) until it is properly fixed.
MFC with: r273264 Requested by: many
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