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33ff10ea |
| 17-Mar-2013 |
Ian Lepore <ian@FreeBSD.org> |
Add a macro that gets the physical address of a memory mapped device register from a bus space resource.
Note that this macro is just for ARM, and is intended to have a short lifespan. The DMA engi
Add a macro that gets the physical address of a memory mapped device register from a bus space resource.
Note that this macro is just for ARM, and is intended to have a short lifespan. The DMA engines in some SoCs need the physical address of a memory-mapped device register as one of the arguments for the transfer. Several scattered ad-hoc solutions have been converted to use this macro, which now also serves to mark the places where a more complete fix needs to be applied (after that fix has been designed).
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adc99a8a |
| 28-Feb-2013 |
Oleksandr Tymoshenko <gonzo@FreeBSD.org> |
Add platform DMA support to SDHCI driver for BCM2835
Submitted by: Daisuke Aoyama <aoyama at peach.ne.jp> Reviewed by: ian@
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d241a0e6 |
| 26-Feb-2013 |
Xin LI <delphij@FreeBSD.org> |
IFC @247348.
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8635d479 |
| 19-Feb-2013 |
Oleksandr Tymoshenko <gonzo@FreeBSD.org> |
Spelling fixes
Spotted by: N. J. Mann
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f91360b1 |
| 19-Feb-2013 |
Oleksandr Tymoshenko <gonzo@FreeBSD.org> |
Roll back change of frequency for initialization sequence since it seems to cause more problems then previous behavior: it either breaks initilization sequence in other places or uncovers problems wi
Roll back change of frequency for initialization sequence since it seems to cause more problems then previous behavior: it either breaks initilization sequence in other places or uncovers problems with high-speed mode timing for SDHCI 3.0
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d3d7f709 |
| 17-Feb-2013 |
Oleksandr Tymoshenko <gonzo@FreeBSD.org> |
- Add hw.bcm2835.sdhci.hs tunable to enable/disable highspeed mode in SDHCI driver Suggested by: Daisuke Aoyama
- Set initilization sequence frequency to 8MHz. It should fix Data CRC error
- Add hw.bcm2835.sdhci.hs tunable to enable/disable highspeed mode in SDHCI driver Suggested by: Daisuke Aoyama
- Set initilization sequence frequency to 8MHz. It should fix Data CRC errors. Standard requires initialization sequence to be executed at 400KHz but on this hardware low frequncies seems to cause Data CRC errors.
Value was derived from analyzing hardware signals after Raspberry Pi is powered up. Before any data is read though DATA line adapter's clock frequency is changed to 8MHz.
Modern cards should function fine at 8MHz but for older MMC cards it can be overriden by setting hw.bcm2835.sdhci.min_freq tunable.
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d9a44755 |
| 08-Feb-2013 |
David E. O'Brien <obrien@FreeBSD.org> |
Sync with HEAD.
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32531ccb |
| 04-Dec-2012 |
Neel Natu <neel@FreeBSD.org> |
IFC @r243836
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Revision tags: release/9.1.0 |
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3b37b3c2 |
| 30-Nov-2012 |
Oleksandr Tymoshenko <gonzo@FreeBSD.org> |
Get frequency from "clock-frequency" property of "/axi/sdhci" FDT node
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300675f6 |
| 27-Nov-2012 |
Alexander Motin <mav@FreeBSD.org> |
MFC
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a10c6f55 |
| 11-Nov-2012 |
Neel Natu <neel@FreeBSD.org> |
IFC @ r242684
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23090366 |
| 04-Nov-2012 |
Simon J. Gerraty <sjg@FreeBSD.org> |
Sync from head
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a9387eb1 |
| 29-Oct-2012 |
Oleksandr Tymoshenko <gonzo@FreeBSD.org> |
Add BCM2835 SDHCI driver and enable it in Raspberry Pi config
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