Revision tags: release/2.2.2_cvs, release/2.2.1_cvs |
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4c024bbd |
| 22-Mar-1997 |
KATO Takenori <kato@FreeBSD.org> |
Improved CPU identification and initialization routines. This supports All Cyrix CPUs, IBM Blue Lightning CPU and NexGen (now AMD) Nx586 CPU, and initialize special registers of Cyrix CPU and msr of
Improved CPU identification and initialization routines. This supports All Cyrix CPUs, IBM Blue Lightning CPU and NexGen (now AMD) Nx586 CPU, and initialize special registers of Cyrix CPU and msr of IBM Blue Lightning CPU.
If revision of Cyrix 6x86 CPU < 2.7, CPU cache is enabled in write-through mode. This can be disabled by kernel configuration options.
Reviewed by: Bruce Evans <bde@freebsd.org> and Jordan K. Hubbard <jkh@freebsd.org>
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Revision tags: release/2.2.0, release/2.1.7_cvs |
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6875d254 |
| 22-Feb-1997 |
Peter Wemm <peter@FreeBSD.org> |
Back out part 1 of the MCFH that changed $Id$ to $FreeBSD$. We are not ready for it yet.
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Revision tags: release/2.1.6_cvs, release/2.1.6.1 |
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1130b656 |
| 14-Jan-1997 |
Jordan K. Hubbard <jkh@FreeBSD.org> |
Make the long-awaited change from $Id$ to $FreeBSD$
This will make a number of things easier in the future, as well as (finally!) avoiding the Id-smashing problem which has plagued developers for so
Make the long-awaited change from $Id$ to $FreeBSD$
This will make a number of things easier in the future, as well as (finally!) avoiding the Id-smashing problem which has plagued developers for so long.
Boy, I'm glad we're not using sup anymore. This update would have been insane otherwise.
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d22671dc |
| 11-Nov-1996 |
John Dyson <dyson@FreeBSD.org> |
Support the PG_G flag on Pentium-Pro processors. This pretty much eliminates the unnecessary unmapping of the kernel during context switches and during invtlb...
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Revision tags: release/2.1.5_cvs |
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70013b57 |
| 03-Jun-1996 |
Søren Schmidt <sos@FreeBSD.org> |
Added missing CR0_NW define for Cyrix 486DLC support. It's still not stable on my hardware, but its better... *sigh*
Obtained from: NetBSD
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6c5e9bbd |
| 31-Jan-1996 |
Mike Pritchard <mpp@FreeBSD.org> |
Fix a bunch of spelling errors in the comment fields of a bunch of system include files.
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Revision tags: release/2.1.0_cvs, release/2.0.5_cvs |
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9b2e5354 |
| 30-May-1995 |
Rodney W. Grimes <rgrimes@FreeBSD.org> |
Remove trailing whitespace.
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3117fbd9 |
| 14-Jan-1995 |
Bruce Evans <bde@FreeBSD.org> |
Enable define of CR0_AM to prepare for implementing alignment checking.
Uniformize idempotency ifdef.
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Revision tags: release/2.0 |
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654f1333 |
| 05-Sep-1994 |
David Greenman <dg@FreeBSD.org> |
Improved some comments.
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c7841723 |
| 04-Sep-1994 |
Paul Traina <pst@FreeBSD.org> |
Detect if we're running on a Cyrix 486DLC and enable automatic cache negation whenever we access memory between 640k and 1M.
Original code from NetBSD 1.0-BETA. The exact origins are unclear but Th
Detect if we're running on a Cyrix 486DLC and enable automatic cache negation whenever we access memory between 640k and 1M.
Original code from NetBSD 1.0-BETA. The exact origins are unclear but Theo de Raadt, Charles, and Michael V. may have contributed to it.
Submitted by: pst
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Revision tags: release/1.1.5.1_cvs, release/1.1.0_cvs |
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6e393973 |
| 07-Nov-1993 |
Garrett Wollman <wollman@FreeBSD.org> |
Made all header files idempotent and moved incorrect common data from headers into a related source file. Added cons.h as first step towards moving i386/i386/cons.h to machine/cons.h where it belong
Made all header files idempotent and moved incorrect common data from headers into a related source file. Added cons.h as first step towards moving i386/i386/cons.h to machine/cons.h where it belongs.
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Revision tags: release/1.0.0_cvs |
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34a8ed1b |
| 16-Oct-1993 |
Rodney W. Grimes <rgrimes@FreeBSD.org> |
Removed all patch kit headers, sccsid and rcsid strings, put $Id$ in, some minor cleanup. Added $Id$ to files that did not have any version info, etc
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5b81b6b3 |
| 12-Jun-1993 |
Rodney W. Grimes <rgrimes@FreeBSD.org> |
Initial import, 0.1 + pk 0.2.4-B1
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121b3af9 |
| 22-Mar-2010 |
John Baldwin <jhb@FreeBSD.org> |
Remove unneeded type specifiers from 64-bit constants. The compiler infers their natural type from the constants' values.
Submitted by: bde MFC after: 3 days
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Revision tags: release/7.3.0_cvs, release/7.3.0 |
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cea8f9df |
| 21-Mar-2010 |
Alan Cox <alc@FreeBSD.org> |
I am told by AMD that the machine check hardware on the instruction TLB won't generate bogus exceptions. Therefore, the implementation of the "unofficial" workaround needn't mask L1TP errors by the
I am told by AMD that the machine check hardware on the instruction TLB won't generate bogus exceptions. Therefore, the implementation of the "unofficial" workaround needn't mask L1TP errors by the instruction cache unit.
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a311ca2f |
| 16-Mar-2010 |
John Baldwin <jhb@FreeBSD.org> |
- Extend the machine check record structure to include several fields useful for parsing model-specific and other fields in machine check events including the global machine check capabilities an
- Extend the machine check record structure to include several fields useful for parsing model-specific and other fields in machine check events including the global machine check capabilities and status registers, CPU identification, and the FreeBSD CPU ID. - Report these added fields in the console log of a machine check so that a record structure can be reconstituted from the console messages. - Parse new architectural errors including memory controller errors.
MFC after: 1 week
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102c07ed |
| 09-Mar-2010 |
Alan Cox <alc@FreeBSD.org> |
Implement AMD's recommended workaround for Erratum 383 on Family 10h processors. With this workaround, superpage promotion can be re-enabled under virtualization. Moreover, machine check exceptions
Implement AMD's recommended workaround for Erratum 383 on Family 10h processors. With this workaround, superpage promotion can be re-enabled under virtualization. Moreover, machine check exceptions can safely be enabled when FreeBSD is running natively on Family 10h processors.
Most of the credit should go to Andriy Gapon for diagnosing the error and working with Borislav Petkov at AMD to document it. Andriy also reviewed and tested my patches.
Discussed with: jhb MFC after: 3 weeks
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9199c09a |
| 06-Jan-2010 |
Warner Losh <imp@FreeBSD.org> |
Merge from head at r201628.
# This hasn't been tested, and there are at least three bad commits # that need to be backed out before the branch will be stable again.
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71224c78 |
| 30-Nov-2009 |
Andriy Gapon <avg@FreeBSD.org> |
x86 cpu features: add MOVBE reporting and flag
The check is glimpsed from Linux and OpenSolaris. MOVBE instruction is found in Intel Atom processors.
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1ee774f6 |
| 02-Oct-2009 |
Oleksandr Tymoshenko <gonzo@FreeBSD.org> |
- MFC
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3bcdfb9b |
| 10-Sep-2009 |
Jung-uk Kim <jkim@FreeBSD.org> |
Consolidate CPUID to CPU family/model macros for amd64 and i386 to reduce unnecessary #ifdef's for shared code between them.
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2e370a5c |
| 26-May-2009 |
Oleksandr Tymoshenko <gonzo@FreeBSD.org> |
Merge from HEAD
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9dc0b3d5 |
| 13-May-2009 |
John Baldwin <jhb@FreeBSD.org> |
Implement simple machine check support for amd64 and i386. - For CPUs that only support MCE (the machine check exception) but not MCA (i.e. Pentium), all this does is print out the value of the mac
Implement simple machine check support for amd64 and i386. - For CPUs that only support MCE (the machine check exception) but not MCA (i.e. Pentium), all this does is print out the value of the machine check registers and then panic when a machine check exception occurs. - For CPUs that support MCA (the machine check architecture), the support is a bit more involved. - First, there is limited support for decoding the CPU-independent MCA error codes in the kernel, and the kernel uses this to output a short description of any machine check events that occur. - When a machine check exception occurs, all of the MCx banks on the current CPU are scanned and any events are reported to the console before panic'ing. - To catch events for correctable errors, a periodic timer kicks off a task which scans the MCx banks on all CPUs. The frequency of these checks is controlled via the "hw.mca.interval" sysctl. - Userland can request an immediate scan of the MCx banks by writing a non-zero value to "hw.mca.force_scan". - If any correctable events are encountered, the appropriate details are stored in a 'struct mca_record' (defined in <machine/mca.h>). The "hw.mca.count" is a count of such records and each record may be queried via the "hw.mca.records" tree by specifying the record index (0 .. count - 1) as the next name in the MIB similar to using PIDs with the kern.proc.* sysctls. The idea is to export machine check events to userland for more detailed processing. - The periodic timer and hw.mca sysctls are only present if the CPU supports MCA.
Discussed with: emaste (briefly) MFC after: 1 month
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e7153b25 |
| 07-May-2009 |
Oleksandr Tymoshenko <gonzo@FreeBSD.org> |
Merge from HEAD
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Revision tags: release/7.2.0_cvs, release/7.2.0 |
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82fcb0f1 |
| 29-Apr-2009 |
Jeff Roberson <jeff@FreeBSD.org> |
- Add support for cpuid leaf 0xb. This allows us to determine the topology of nehalem/corei7 based systems. - Remove the cpu_cores/cpu_logical detection from identcpu. - Describe the layout of
- Add support for cpuid leaf 0xb. This allows us to determine the topology of nehalem/corei7 based systems. - Remove the cpu_cores/cpu_logical detection from identcpu. - Describe the layout of the system in cpu_mp_announce().
Sponsored by: Nokia
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