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4c8095b1 |
| 09-Jan-2020 |
Jung-uk Kim <jkim@FreeBSD.org> |
Catch up with Clang 9.0.
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dea24746 |
| 09-Jan-2020 |
Warner Losh <imp@FreeBSD.org> |
Add note to remind me there are three choices for arm32 floating point.
hard use floating point hardware, pass registers to functions in floating point registers. softfp use floating point hardware
Add note to remind me there are three choices for arm32 floating point.
hard use floating point hardware, pass registers to functions in floating point registers. softfp use floating point hardware, but pass registers to functions in integer registers. soft do floating point calcuations without using floating point hardware. Pass arguments in integer registers.
FreeBSD 11 and newer assumes hard. 10 and earlier assumed softfp. We have no real support, at the moment, for soft. It's untested, though, if softfp still works.
Add a note here since this is a whack-a-doodle combination relative to all other platforms.
softfp is likely to go away in the future because it was retained for people using FreeBSD 10 + armv6 needing to transition more slowly from softfp -> hard than the project. It likely is no longer needed, and may be getting in the way of people needing 'soft' support.
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79f59915 |
| 08-Jan-2020 |
John Baldwin <jhb@FreeBSD.org> |
Add -mno-relax to CFLAGS in bsd.prog/lib.mk instead of bsd.cpu.mk.
bsd.cpu.mk is included by bsd.init.mk before bsd.linker.mk, so it was always setting the flag since LINKER_FEATURES wasn't defined.
Add -mno-relax to CFLAGS in bsd.prog/lib.mk instead of bsd.cpu.mk.
bsd.cpu.mk is included by bsd.init.mk before bsd.linker.mk, so it was always setting the flag since LINKER_FEATURES wasn't defined.
Reported by: mhorne Reviewed by: imp, mhorne Sponsored by: DARPA Differential Revision: https://reviews.freebsd.org/D23076
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b451cd45 |
| 24-Dec-2019 |
Justin Hibbits <jhibbits@FreeBSD.org> |
[PowerPC64] Use ld.bfd to build LIB32 and STAND - when using llvm
Summary: This patch is to support ongoing work for replacing "GCC/BFD" by "CLANG/LLD" on target PowerPC64 [1], by proposing a way t
[PowerPC64] Use ld.bfd to build LIB32 and STAND - when using llvm
Summary: This patch is to support ongoing work for replacing "GCC/BFD" by "CLANG/LLD" on target PowerPC64 [1], by proposing a way to specify and/or locate a secondary ld.bfd linker. This is necessary as LLD currently doesn't support PowerPC 32 bits, so we keep using BFD for the 32 bit stuff on PowePC64(LIB32 compatibility and STAND/slof/loader.)
- creates LD_BFD variable pointing to ld.bfd - use LD_BFD as linker for LIB32/compat - Default behavior for other platforms aren't changed.
[1] https://wiki.freebsd.org/powerpc/llvm-elfv2
Submitted by: alfredo.junior_eldorado.org.br Reviewed by: imp Differential Revision: https://reviews.freebsd.org/D20261
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0869dceb |
| 05-Dec-2019 |
John Baldwin <jhb@FreeBSD.org> |
Add a new "riscv-relaxations" linker feature.
When the linker doesn't have this feature, add -mno-relax to CFLAGS on RISC-V.
Define the feature for ld.bfd, but not lld. If lld gains relaxation sup
Add a new "riscv-relaxations" linker feature.
When the linker doesn't have this feature, add -mno-relax to CFLAGS on RISC-V.
Define the feature for ld.bfd, but not lld. If lld gains relaxation support in a newer version, we can enable it for those versions of lld in bsd.linker.mk.
Reviewed by: mhorne Sponsored by: DARPA Differential Revision: https://reviews.freebsd.org/D22659
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dc67cfef |
| 10-Nov-2019 |
Justin Hibbits <jhibbits@FreeBSD.org> |
Consolidate powerpcspe CFLAGS
Don't depend on CPUTYPE to define powerpcspe CFLAGS, they should be set unconditionally. This reduces duplication. Also, set some CFLAGS as gcc-only, because clang's
Consolidate powerpcspe CFLAGS
Don't depend on CPUTYPE to define powerpcspe CFLAGS, they should be set unconditionally. This reduces duplication. Also, set some CFLAGS as gcc-only, because clang's SPE support always uses the SPE ABI, it's not an optional feature.
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52751739 |
| 10-Nov-2019 |
Justin Hibbits <jhibbits@FreeBSD.org> |
powerpcspe: use -mspe instead of -mspe=yes to enable SPE
-mspe=yes/no was deprecated even before GCC 4.2.1 in favor of -mspe/-mno-spe. Clang only supports -mspe/-mno-spe.
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Revision tags: release/12.1.0 |
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a63915c2 |
| 28-Jul-2019 |
Alan Somers <asomers@FreeBSD.org> |
MFHead @r350386
Sponsored by: The FreeBSD Foundation
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c5d2d5a1 |
| 20-Jul-2019 |
Brooks Davis <brooks@FreeBSD.org> |
Make setting mips endian and ABI less verbose.
Allow ABI to be over ridden to allow (with other changes) programs to be built targeting ABIs other than the default. This is used in CheriBSD.
Revie
Make setting mips endian and ABI less verbose.
Allow ABI to be over ridden to allow (with other changes) programs to be built targeting ABIs other than the default. This is used in CheriBSD.
Reviewed by: imp Obtained from: CheriBSD MFC after: 1 week Sponsored by: DARPA, AFRL Differential Revision: https://reviews.freebsd.org/D21001
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Revision tags: release/11.3.0 |
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7f49ce7a |
| 28-Jun-2019 |
Alan Somers <asomers@FreeBSD.org> |
MFHead @349476
Sponsored by: The FreeBSD Foundation
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e861dab4 |
| 25-Jun-2019 |
Justin Hibbits <jhibbits@FreeBSD.org> |
powerpc: Transition to Secure-PLT, like most other OSs (Toolchain part)
Summary: Toolchain follow-up to r349350. LLVM patches will be submitted upstream for 9.0 as well.
The bsd.cpu.mk change is r
powerpc: Transition to Secure-PLT, like most other OSs (Toolchain part)
Summary: Toolchain follow-up to r349350. LLVM patches will be submitted upstream for 9.0 as well.
The bsd.cpu.mk change is required because GNU ld assumes BSS-PLT if it cannot determine for certain that it needs Secure-PLT, and some binaries do not compile in such a way to make it know to use Secure-PLT.
Reviewed By: nwhitehorn, bdragon, pfg Differential Revision: https://reviews.freebsd.org/D20598
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415e34c4 |
| 29-Mar-2019 |
Alan Somers <asomers@FreeBSD.org> |
MFHead@r345677
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0fa5ee1f |
| 21-Mar-2019 |
Jung-uk Kim <jkim@FreeBSD.org> |
Catch up with Clang 8.0.
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f4590b8c |
| 21-Mar-2019 |
Jung-uk Kim <jkim@FreeBSD.org> |
Catch up with Clang 7.0.
MFC after: 3 days
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9e43c218 |
| 10-Feb-2019 |
Dimitry Andric <dim@FreeBSD.org> |
Merge ^/head r343807 through r343955.
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63d33e48 |
| 09-Feb-2019 |
Justin Hibbits <jhibbits@FreeBSD.org> |
Correct the CPU target for powerpcspe
The MPC8540 is actually e500v1, which doesn't have double-precision floating point support. The 8548 does, so use that as the CPU target.
MFC after: 2 weeks
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Revision tags: release/12.0.0 |
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3af64f03 |
| 11-Sep-2018 |
Dimitry Andric <dim@FreeBSD.org> |
Merge ^/head r338392 through r338594.
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888c8381 |
| 03-Sep-2018 |
Ruslan Bukin <br@FreeBSD.org> |
Enable 'C'-compressed ISA extension.
This was disabled recently due to lack of support in KDB disassembler and DTrace FBT provider. Support for 'C'-extension to both of these was added, so we can no
Enable 'C'-compressed ISA extension.
This was disabled recently due to lack of support in KDB disassembler and DTrace FBT provider. Support for 'C'-extension to both of these was added, so we can now enable 'C'-extension.
This reduces size of the kernel important for low-end embedded devices, and saves cache footprint for high perfomance machines.
Approved by: re (kib) Sponsored by: DARPA, AFRL
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14b841d4 |
| 11-Aug-2018 |
Kyle Evans <kevans@FreeBSD.org> |
MFH @ r337607, in preparation for boarding
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c81b12e0 |
| 27-Jul-2018 |
Warner Losh <imp@FreeBSD.org> |
Revert r336773: it removed too much.
r336773 removed all things xscale. However, some things xscale are really armv5. Revert that entirely. A more modest removal will follow.
Noticed by: andrew@
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626930c2 |
| 27-Jul-2018 |
Warner Losh <imp@FreeBSD.org> |
Remove xscale support
The OLD XSCALE stuff hasn't been useful in a while. The original committer (cognet@) was the only one that had boards for it. He's blessed this removal. Newer XSCALE (GUMSTIX)
Remove xscale support
The OLD XSCALE stuff hasn't been useful in a while. The original committer (cognet@) was the only one that had boards for it. He's blessed this removal. Newer XSCALE (GUMSTIX) is for hardware that's quite old. After discussion on arm@, it was clear there was no support for keeping it.
Differential Review: https://reviews.freebsd.org/D16313
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8e8fbf19 |
| 25-Jul-2018 |
Ruslan Bukin <br@FreeBSD.org> |
Disable 'C'-compressed ISA extension.
It works excellent, but KDB disassembler and DTrace FBT provider for RISC-V do lack support for it. They currently handle 4-byte instructions only, while C-comp
Disable 'C'-compressed ISA extension.
It works excellent, but KDB disassembler and DTrace FBT provider for RISC-V do lack support for it. They currently handle 4-byte instructions only, while C-compressed ISA extension introduces 2-byte instructions freely mixing them together.
So disable it for now.
Reviewed by: markj@ Sponsored by: DARPA, AFRL Differential Revision: https://reviews.freebsd.org/D16436
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71cb2dfc |
| 18-Jul-2018 |
Warner Losh <imp@FreeBSD.org> |
Remove special cases for armeb in the build.
Differential Revision: https://reviews.freebsd.org/D16257
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1d2ec69b |
| 03-Jul-2018 |
John Baldwin <jhb@FreeBSD.org> |
Don't specify the desired march/mabi for RISC-V in ACFLAGS.
ACFLAGS is only used in addition to CFLAGS, so setting the options in both was redundant. However, ACFLAGS is added to the command line a
Don't specify the desired march/mabi for RISC-V in ACFLAGS.
ACFLAGS is only used in addition to CFLAGS, so setting the options in both was redundant. However, ACFLAGS is added to the command line after CFLAGS, so the settings from ACFLAGS were applied for assembly files in kernel modules after the kernel-specific march/abi in CFLAGS. As a result, the hard-float ACFLAGS in bsd.cpu.mk was overriding the soft-float CFLAGS.gcc in sys/conf/kern.mk. In particular, dtrace_asm.o was compiled as hard-float and the linker refused to link dtrace.ko since its object files contained a mix of hard and soft float.
Reviewed by: br Sponsored by: DARPA / AFRL Differential Revision: https://reviews.freebsd.org/D16054
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Revision tags: release/11.2.0 |
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2f7f1977 |
| 19-Jun-2018 |
Ruslan Bukin <br@FreeBSD.org> |
Don't use TARGET_ARCH in this file, use MACHINE_ARCH instead.
TARGET_ARCH is not defined when building ports/packages.
Sponsored by: DARPA, AFRL
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