bhyverun.c (75d1e855b0a2acfb60e5a3c81b018d8f73ebf450) bhyverun.c (55c13f6e7a412cc4bd0ea3fc183cd7c5c2348f01)
1/*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2011 NetApp, Inc.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions

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80#include "config.h"
81#include "inout.h"
82#include "debug.h"
83#ifdef __amd64__
84#include "amd64/e820.h"
85#include "amd64/fwctl.h"
86#endif
87#include "gdb.h"
1/*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2011 NetApp, Inc.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions

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80#include "config.h"
81#include "inout.h"
82#include "debug.h"
83#ifdef __amd64__
84#include "amd64/e820.h"
85#include "amd64/fwctl.h"
86#endif
87#include "gdb.h"
88#include "ioapic.h"
89#ifdef __amd64__
88#ifdef __amd64__
89#include "amd64/ioapic.h"
90#include "amd64/kernemu_dev.h"
91#endif
92#include "mem.h"
93#include "mevent.h"
94#ifdef __amd64__
95#include "amd64/mptbl.h"
96#endif
97#include "pci_emul.h"
90#include "amd64/kernemu_dev.h"
91#endif
92#include "mem.h"
93#include "mevent.h"
94#ifdef __amd64__
95#include "amd64/mptbl.h"
96#endif
97#include "pci_emul.h"
98#include "pci_irq.h"
99#include "pci_lpc.h"
98#ifdef __amd64__
99#include "amd64/pci_irq.h"
100#include "amd64/pci_lpc.h"
101#endif
100#include "qemu_fwcfg.h"
101#include "smbiostbl.h"
102#ifdef BHYVE_SNAPSHOT
103#include "snapshot.h"
104#endif
105#include "tpm_device.h"
106#ifdef __amd64__
107#include "amd64/rtc.h"

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629do_open(const char *vmname)
630{
631 struct vmctx *ctx;
632 int error;
633 bool reinit, romboot;
634
635 reinit = romboot = false;
636
102#include "qemu_fwcfg.h"
103#include "smbiostbl.h"
104#ifdef BHYVE_SNAPSHOT
105#include "snapshot.h"
106#endif
107#include "tpm_device.h"
108#ifdef __amd64__
109#include "amd64/rtc.h"

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631do_open(const char *vmname)
632{
633 struct vmctx *ctx;
634 int error;
635 bool reinit, romboot;
636
637 reinit = romboot = false;
638
639#ifdef __amd64__
637 if (lpc_bootrom())
638 romboot = true;
640 if (lpc_bootrom())
641 romboot = true;
642#endif
639
640 error = vm_create(vmname);
641 if (error) {
642 if (errno == EEXIST) {
643 if (romboot) {
644 reinit = true;
645 } else {
646 /*

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850 parse_gdb_options(optarg);
851 break;
852 case 'k':
853 parse_simple_config_file(optarg);
854 break;
855 case 'K':
856 set_config_value("keyboard.layout", optarg);
857 break;
643
644 error = vm_create(vmname);
645 if (error) {
646 if (errno == EEXIST) {
647 if (romboot) {
648 reinit = true;
649 } else {
650 /*

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854 parse_gdb_options(optarg);
855 break;
856 case 'k':
857 parse_simple_config_file(optarg);
858 break;
859 case 'K':
860 set_config_value("keyboard.layout", optarg);
861 break;
862#ifdef __amd64__
858 case 'l':
859 if (strncmp(optarg, "help", strlen(optarg)) == 0) {
860 lpc_print_supported_devices();
861 exit(0);
862 } else if (lpc_device_parse(optarg) != 0) {
863 errx(EX_USAGE, "invalid lpc device "
864 "configuration '%s'", optarg);
865 }
866 break;
863 case 'l':
864 if (strncmp(optarg, "help", strlen(optarg)) == 0) {
865 lpc_print_supported_devices();
866 exit(0);
867 } else if (lpc_device_parse(optarg) != 0) {
868 errx(EX_USAGE, "invalid lpc device "
869 "configuration '%s'", optarg);
870 }
871 break;
872#endif
867#ifdef BHYVE_SNAPSHOT
868 case 'r':
869 restore_file = optarg;
870 break;
871#endif
872 case 's':
873 if (strncmp(optarg, "help", strlen(optarg)) == 0) {
874 pci_print_supported_devices();

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1032 init_mem(guest_ncpus);
1033 init_inout();
1034#ifdef __amd64__
1035 kernemu_dev_init();
1036#endif
1037 init_bootrom(ctx);
1038#ifdef __amd64__
1039 atkbdc_init(ctx);
873#ifdef BHYVE_SNAPSHOT
874 case 'r':
875 restore_file = optarg;
876 break;
877#endif
878 case 's':
879 if (strncmp(optarg, "help", strlen(optarg)) == 0) {
880 pci_print_supported_devices();

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1038 init_mem(guest_ncpus);
1039 init_inout();
1040#ifdef __amd64__
1041 kernemu_dev_init();
1042#endif
1043 init_bootrom(ctx);
1044#ifdef __amd64__
1045 atkbdc_init(ctx);
1040#endif
1041 pci_irq_init(ctx);
1042 ioapic_init(ctx);
1046 pci_irq_init(ctx);
1047 ioapic_init(ctx);
1048#endif
1043
1044#ifdef __amd64__
1045 rtc_init(ctx);
1046 sci_init(ctx);
1047#endif
1048
1049 if (qemu_fwcfg_init(ctx) != 0) {
1050 fprintf(stderr, "qemu fwcfg initialization error");

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1080 * Initialize after PCI, to allow a bootrom file to reserve the high
1081 * region.
1082 */
1083 if (get_config_bool("acpi_tables"))
1084 vmgenc_init(ctx);
1085
1086 init_gdb(ctx);
1087
1049
1050#ifdef __amd64__
1051 rtc_init(ctx);
1052 sci_init(ctx);
1053#endif
1054
1055 if (qemu_fwcfg_init(ctx) != 0) {
1056 fprintf(stderr, "qemu fwcfg initialization error");

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1086 * Initialize after PCI, to allow a bootrom file to reserve the high
1087 * region.
1088 */
1089 if (get_config_bool("acpi_tables"))
1090 vmgenc_init(ctx);
1091
1092 init_gdb(ctx);
1093
1094#ifdef __amd64__
1088 if (lpc_bootrom()) {
1089 if (vm_set_capability(bsp, VM_CAP_UNRESTRICTED_GUEST, 1)) {
1090 fprintf(stderr, "ROM boot failed: unrestricted guest "
1091 "capability not available\n");
1092 exit(4);
1093 }
1094 error = vcpu_reset(bsp);
1095 assert(error == 0);
1096 }
1095 if (lpc_bootrom()) {
1096 if (vm_set_capability(bsp, VM_CAP_UNRESTRICTED_GUEST, 1)) {
1097 fprintf(stderr, "ROM boot failed: unrestricted guest "
1098 "capability not available\n");
1099 exit(4);
1100 }
1101 error = vcpu_reset(bsp);
1102 assert(error == 0);
1103 }
1104#endif
1097
1098 /*
1099 * Add all vCPUs.
1100 */
1101 for (int vcpuid = 0; vcpuid < guest_ncpus; vcpuid++)
1102 spinup_vcpu(&vcpu_info[vcpuid], vcpuid == BSP);
1103
1104#ifdef BHYVE_SNAPSHOT

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1105
1106 /*
1107 * Add all vCPUs.
1108 */
1109 for (int vcpuid = 0; vcpuid < guest_ncpus; vcpuid++)
1110 spinup_vcpu(&vcpu_info[vcpuid], vcpuid == BSP);
1111
1112#ifdef BHYVE_SNAPSHOT

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