ps3-hvcall.h (935205e2307611615ed5a7fe0a32b225ffd8c19c) ps3-hvcall.h (263b790117fe175573ade8ed170a32d3a0c005f4)
1/*
2 * Playstation 3 LV1 hypercall interface
3 *
4 * $FreeBSD$
5 */
6
7#include <sys/types.h>
8

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119int lv1_deconfigure_virtual_uart_irq(void);
120int lv1_enable_logical_spe(uint64_t spe_id, uint64_t resource_id);
121int lv1_gpu_open(uint64_t zero);
122int lv1_gpu_close(void);
123int lv1_gpu_device_map(uint64_t dev, uint64_t *lpar_addr, uint64_t *lpar_size);
124int lv1_gpu_device_unmap(uint64_t dev);
125int lv1_gpu_memory_allocate(uint64_t ddr_size, uint64_t zero1, uint64_t zero2, uint64_t zero3, uint64_t zero4, uint64_t *handle, uint64_t *ddr_lpar);
126int lv1_gpu_memory_free(uint64_t handle);
1/*
2 * Playstation 3 LV1 hypercall interface
3 *
4 * $FreeBSD$
5 */
6
7#include <sys/types.h>
8

--- 110 unchanged lines hidden (view full) ---

119int lv1_deconfigure_virtual_uart_irq(void);
120int lv1_enable_logical_spe(uint64_t spe_id, uint64_t resource_id);
121int lv1_gpu_open(uint64_t zero);
122int lv1_gpu_close(void);
123int lv1_gpu_device_map(uint64_t dev, uint64_t *lpar_addr, uint64_t *lpar_size);
124int lv1_gpu_device_unmap(uint64_t dev);
125int lv1_gpu_memory_allocate(uint64_t ddr_size, uint64_t zero1, uint64_t zero2, uint64_t zero3, uint64_t zero4, uint64_t *handle, uint64_t *ddr_lpar);
126int lv1_gpu_memory_free(uint64_t handle);
127int lv1_gpu_context_allocate(uint64_t handle, uint64_t , uint64_t *zero);
127int lv1_gpu_context_allocate(uint64_t handle, uint64_t flags, uint64_t *chandle, uint64_t *lpar_dma_control, uint64_t *lpar_driver_info, uint64_t *lpar_reports, uint64_t *lpar_reports_size);
128int lv1_gpu_context_free(uint64_t chandle);
129int lv1_gpu_context_iomap(uint64_t changle, uint64_t gpu_ioif, uint64_t xdr_lpar, uint64_t fbsize, uint64_t ioflags);
130int lv1_gpu_context_attribute(uint64_t chandle, uint64_t op, uint64_t p1, uint64_t p2, uint64_t p3, uint64_t p4);
131int lv1_gpu_context_intr(uint64_t chandle, uint64_t *v1);
128int lv1_gpu_context_free(uint64_t chandle);
129int lv1_gpu_context_iomap(uint64_t changle, uint64_t gpu_ioif, uint64_t xdr_lpar, uint64_t fbsize, uint64_t ioflags);
130int lv1_gpu_context_attribute(uint64_t chandle, uint64_t op, uint64_t p1, uint64_t p2, uint64_t p3, uint64_t p4);
131int lv1_gpu_context_intr(uint64_t chandle, uint64_t *v1);
132int lv1_gpu_attribute(uint64_t p1, uint64_t p2, uint64_t p3, uint64_t p4, uint64_t p5);
132int lv1_get_rtc(uint64_t *rtc_val, uint64_t *timebase);
133int lv1_storage_read(uint64_t dev, uint64_t region, uint64_t sector, uint64_t nsectors, uint64_t flags, uint64_t buf, uint64_t *dma_tag);
134int lv1_storage_write(uint64_t dev, uint64_t region, uint64_t sector, uint64_t nsectors, uint64_t flags, uint64_t buf, uint64_t *dma_tag);
135int lv1_storage_send_device_command(uint64_t dev, uint64_t cmd_id, uint64_t cmd_block, uint64_t cmd_size, uint64_t data_buf, uint64_t blocks, uint64_t *dma_tag);
136int lv1_storage_get_async_status(uint64_t dev, uint64_t *dma_tag, uint64_t *status);
137int lv1_storage_check_async_status(uint64_t dev, uint64_t dma_tag, uint64_t *status);
138int lv1_panic(uint64_t howto);
133int lv1_get_rtc(uint64_t *rtc_val, uint64_t *timebase);
134int lv1_storage_read(uint64_t dev, uint64_t region, uint64_t sector, uint64_t nsectors, uint64_t flags, uint64_t buf, uint64_t *dma_tag);
135int lv1_storage_write(uint64_t dev, uint64_t region, uint64_t sector, uint64_t nsectors, uint64_t flags, uint64_t buf, uint64_t *dma_tag);
136int lv1_storage_send_device_command(uint64_t dev, uint64_t cmd_id, uint64_t cmd_block, uint64_t cmd_size, uint64_t data_buf, uint64_t blocks, uint64_t *dma_tag);
137int lv1_storage_get_async_status(uint64_t dev, uint64_t *dma_tag, uint64_t *status);
138int lv1_storage_check_async_status(uint64_t dev, uint64_t dma_tag, uint64_t *status);
139int lv1_panic(uint64_t howto);