mmu_oea.c (b9f2f8c36f23f48488e9f8ae2b018d3fa6c3a44b) mmu_oea.c (fe3b4685c7bf5573e46a465f3882e9fd7a617bb2)
1/*-
2 * Copyright (c) 2001 The NetBSD Foundation, Inc.
3 * All rights reserved.
4 *
5 * This code is derived from software contributed to The NetBSD Foundation
6 * by Matt Thomas <matt@3am-software.com> of Allegro Networks, Inc.
7 *
8 * Redistribution and use in source and binary forms, with or without

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192 * Map of physical memory regions.
193 */
194static struct mem_region *regions;
195static struct mem_region *pregions;
196static u_int phys_avail_count;
197static int regions_sz, pregions_sz;
198static struct ofw_map *translations;
199
1/*-
2 * Copyright (c) 2001 The NetBSD Foundation, Inc.
3 * All rights reserved.
4 *
5 * This code is derived from software contributed to The NetBSD Foundation
6 * by Matt Thomas <matt@3am-software.com> of Allegro Networks, Inc.
7 *
8 * Redistribution and use in source and binary forms, with or without

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192 * Map of physical memory regions.
193 */
194static struct mem_region *regions;
195static struct mem_region *pregions;
196static u_int phys_avail_count;
197static int regions_sz, pregions_sz;
198static struct ofw_map *translations;
199
200extern struct pmap ofw_pmap;
201
202/*
203 * Lock for the pteg and pvo tables.
204 */
205struct mtx moea_table_mutex;
206struct mtx moea_vsid_mutex;
207
208/* tlbie instruction synchronization */
209static struct mtx tlbie_mtx;

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664 __asm __volatile("mtibatu 1,%0" :: "r"(0));
665 __asm __volatile("mtdbatu 2,%0" :: "r"(0));
666 __asm __volatile("mtibatu 2,%0" :: "r"(0));
667 __asm __volatile("mtdbatu 3,%0" :: "r"(0));
668 __asm __volatile("mtibatu 3,%0" :: "r"(0));
669 isync();
670
671 for (i = 0; i < 16; i++)
200/*
201 * Lock for the pteg and pvo tables.
202 */
203struct mtx moea_table_mutex;
204struct mtx moea_vsid_mutex;
205
206/* tlbie instruction synchronization */
207static struct mtx tlbie_mtx;

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662 __asm __volatile("mtibatu 1,%0" :: "r"(0));
663 __asm __volatile("mtdbatu 2,%0" :: "r"(0));
664 __asm __volatile("mtibatu 2,%0" :: "r"(0));
665 __asm __volatile("mtdbatu 3,%0" :: "r"(0));
666 __asm __volatile("mtibatu 3,%0" :: "r"(0));
667 isync();
668
669 for (i = 0; i < 16; i++)
672 mtsrin(i << ADDR_SR_SHFT, EMPTY_SEGMENT);
673
674 __asm __volatile("mtsr %0,%1" :: "n"(KERNEL_SR), "r"(KERNEL_SEGMENT));
675 __asm __volatile("mtsr %0,%1" :: "n"(KERNEL2_SR), "r"(KERNEL2_SEGMENT));
670 mtsrin(i << ADDR_SR_SHFT, kernel_pmap->pm_sr[i]);
676 powerpc_sync();
677
678 sdr = (u_int)moea_pteg_table | (moea_pteg_mask >> 10);
679 __asm __volatile("mtsdr1 %0" :: "r"(sdr));
680 isync();
681
682 tlbia();
683}

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854 /*
855 * Make sure kernel vsid is allocated as well as VSID 0.
856 */
857 moea_vsid_bitmap[(KERNEL_VSIDBITS & (NPMAPS - 1)) / VSID_NBPW]
858 |= 1 << (KERNEL_VSIDBITS % VSID_NBPW);
859 moea_vsid_bitmap[0] |= 1;
860
861 /*
671 powerpc_sync();
672
673 sdr = (u_int)moea_pteg_table | (moea_pteg_mask >> 10);
674 __asm __volatile("mtsdr1 %0" :: "r"(sdr));
675 isync();
676
677 tlbia();
678}

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849 /*
850 * Make sure kernel vsid is allocated as well as VSID 0.
851 */
852 moea_vsid_bitmap[(KERNEL_VSIDBITS & (NPMAPS - 1)) / VSID_NBPW]
853 |= 1 << (KERNEL_VSIDBITS % VSID_NBPW);
854 moea_vsid_bitmap[0] |= 1;
855
856 /*
862 * Set up the Open Firmware pmap and add it's mappings.
857 * Initialize the kernel pmap (which is statically allocated).
863 */
858 */
864 moea_pinit(mmup, &ofw_pmap);
865 ofw_pmap.pm_sr[KERNEL_SR] = KERNEL_SEGMENT;
866 ofw_pmap.pm_sr[KERNEL2_SR] = KERNEL2_SEGMENT;
859 PMAP_LOCK_INIT(kernel_pmap);
860 for (i = 0; i < 16; i++)
861 kernel_pmap->pm_sr[i] = EMPTY_SEGMENT + i;
862 kernel_pmap->pm_active = ~0;
863
864 /*
865 * Set up the Open Firmware mappings
866 */
867 if ((chosen = OF_finddevice("/chosen")) == -1)
868 panic("moea_bootstrap: can't find /chosen");
869 OF_getprop(chosen, "mmu", &mmui, 4);
870 if ((mmu = OF_instance_to_package(mmui)) == -1)
871 panic("moea_bootstrap: can't get mmu package");
872 if ((sz = OF_getproplen(mmu, "translations")) == -1)
873 panic("moea_bootstrap: can't get ofw translation count");
874 translations = NULL;

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895 * If the mapping is 1:1, let the RAM and device on-demand
896 * BAT tables take care of the translation.
897 */
898 if (translations[i].om_va == translations[i].om_pa)
899 continue;
900
901 /* Enter the pages */
902 for (off = 0; off < translations[i].om_len; off += PAGE_SIZE) {
867 if ((chosen = OF_finddevice("/chosen")) == -1)
868 panic("moea_bootstrap: can't find /chosen");
869 OF_getprop(chosen, "mmu", &mmui, 4);
870 if ((mmu = OF_instance_to_package(mmui)) == -1)
871 panic("moea_bootstrap: can't get mmu package");
872 if ((sz = OF_getproplen(mmu, "translations")) == -1)
873 panic("moea_bootstrap: can't get ofw translation count");
874 translations = NULL;

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895 * If the mapping is 1:1, let the RAM and device on-demand
896 * BAT tables take care of the translation.
897 */
898 if (translations[i].om_va == translations[i].om_pa)
899 continue;
900
901 /* Enter the pages */
902 for (off = 0; off < translations[i].om_len; off += PAGE_SIZE) {
903 struct vm_page m;
904
905 m.phys_addr = translations[i].om_pa + off;
906 m.md.mdpg_cache_attrs = VM_MEMATTR_DEFAULT;
907 m.oflags = VPO_BUSY;
908 PMAP_LOCK(&ofw_pmap);
909 moea_enter_locked(&ofw_pmap,
910 translations[i].om_va + off, &m,
911 VM_PROT_ALL, 1);
912 PMAP_UNLOCK(&ofw_pmap);
903 moea_kenter(mmup, translations[i].om_va + off,
904 translations[i].om_pa + off);
913 ofw_mappings++;
914 }
915 }
916
917 /*
918 * Calculate the last available physical address.
919 */
920 for (i = 0; phys_avail[i + 2] != 0; i += 2)
921 ;
922 Maxmem = powerpc_btop(phys_avail[i + 1]);
923
905 ofw_mappings++;
906 }
907 }
908
909 /*
910 * Calculate the last available physical address.
911 */
912 for (i = 0; phys_avail[i + 2] != 0; i += 2)
913 ;
914 Maxmem = powerpc_btop(phys_avail[i + 1]);
915
924 /*
925 * Initialize the kernel pmap (which is statically allocated).
926 */
927 PMAP_LOCK_INIT(kernel_pmap);
928 for (i = 0; i < 16; i++) {
929 kernel_pmap->pm_sr[i] = EMPTY_SEGMENT;
930 }
931 kernel_pmap->pm_sr[KERNEL_SR] = KERNEL_SEGMENT;
932 kernel_pmap->pm_sr[KERNEL2_SR] = KERNEL2_SEGMENT;
933 kernel_pmap->pm_active = ~0;
934
935 moea_cpu_bootstrap(mmup,0);
936
937 pmap_bootstrapped++;
938
939 /*
940 * Set the start and end of kva.
941 */
942 virtual_avail = VM_MIN_KERNEL_ADDRESS;

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917
918 pmap_bootstrapped++;
919
920 /*
921 * Set the start and end of kva.
922 */
923 virtual_avail = VM_MIN_KERNEL_ADDRESS;

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