subr_smp.c (4428d39d633e9cceeacc0395cd356fa19fe1d09d) subr_smp.c (37b087a645354d60200c774d51b305b268e41c83)
1/*
2 * Copyright (c) 1996, by Steve Passe
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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482 gdt[myid * NGDT + GPROC0_SEL].sd.sd_type = SDT_SYS386TSS;
483 common_tss.tss_esp0 = 0; /* not used until after switch */
484 common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL);
485 common_tss.tss_ioopt = (sizeof common_tss) << 16;
486 tss_gdt = &gdt[myid * NGDT + GPROC0_SEL].sd;
487 common_tssd = *tss_gdt;
488 ltr(gsel_tss);
489
1/*
2 * Copyright (c) 1996, by Steve Passe
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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482 gdt[myid * NGDT + GPROC0_SEL].sd.sd_type = SDT_SYS386TSS;
483 common_tss.tss_esp0 = 0; /* not used until after switch */
484 common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL);
485 common_tss.tss_ioopt = (sizeof common_tss) << 16;
486 tss_gdt = &gdt[myid * NGDT + GPROC0_SEL].sd;
487 common_tssd = *tss_gdt;
488 ltr(gsel_tss);
489
490 load_cr0(0x8005003b); /* XXX! */
491
492 pmap_set_opt();
493}
494
495
496#if defined(APIC_IO)
497/*
498 * Final configuration of the BSP's local APIC:
499 * - disable 'pic mode'.

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618
619#endif /* APIC_IO */
620
621 /* initialize all SMP locks */
622 init_locks();
623
624 /* start each Application Processor */
625 start_all_aps(boot_addr);
490 pmap_set_opt();
491}
492
493
494#if defined(APIC_IO)
495/*
496 * Final configuration of the BSP's local APIC:
497 * - disable 'pic mode'.

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616
617#endif /* APIC_IO */
618
619 /* initialize all SMP locks */
620 init_locks();
621
622 /* start each Application Processor */
623 start_all_aps(boot_addr);
626
627 /*
628 * The init process might be started on a different CPU now,
629 * and the boot CPU might not call prepare_usermode to get
630 * cr0 correctly configured. Thus we initialize cr0 here.
631 */
632 load_cr0(rcr0() | CR0_WP | CR0_AM);
633}
634
635
636/*
637 * look for the MP spec signature
638 */
639
640/* string defined by the Intel MP Spec as identifying the MP table */

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2370 lidt(&r_idt);
2371#endif
2372
2373 /* Build our map of 'other' CPUs. */
2374 other_cpus = all_cpus & ~(1 << cpuid);
2375
2376 printf("SMP: AP CPU #%d Launched!\n", cpuid);
2377
624}
625
626
627/*
628 * look for the MP spec signature
629 */
630
631/* string defined by the Intel MP Spec as identifying the MP table */

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2361 lidt(&r_idt);
2362#endif
2363
2364 /* Build our map of 'other' CPUs. */
2365 other_cpus = all_cpus & ~(1 << cpuid);
2366
2367 printf("SMP: AP CPU #%d Launched!\n", cpuid);
2368
2378 /* XXX FIXME: i386 specific, and redundant: Setup the FPU. */
2379 load_cr0((rcr0() & ~CR0_EM) | CR0_MP | CR0_NE | CR0_TS);
2369 /* set up CPU registers and state */
2370 cpu_setregs();
2380
2381 /* set up FPU state on the AP */
2382 npxinit(__INITIAL_NPXCW__);
2383
2384 /* A quick check from sanity claus */
2385 apic_id = (apic_id_to_logical[(lapic.id & 0x0f000000) >> 24]);
2386 if (cpuid != apic_id) {
2387 printf("SMP: cpuid = %d\n", cpuid);

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2372 /* set up FPU state on the AP */
2373 npxinit(__INITIAL_NPXCW__);
2374
2375 /* A quick check from sanity claus */
2376 apic_id = (apic_id_to_logical[(lapic.id & 0x0f000000) >> 24]);
2377 if (cpuid != apic_id) {
2378 printf("SMP: cpuid = %d\n", cpuid);

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