pmap.c (1ce4b357402c3cd0cba264a15c06b6fd00591088) pmap.c (07a92f34d663f3c96bdca53de3202aa112aac74e)
1/*-
2 * Copyright (c) 1991 Regents of the University of California.
3 * All rights reserved.
4 * Copyright (c) 1994 John S. Dyson
5 * All rights reserved.
6 * Copyright (c) 1994 David Greenman
7 * All rights reserved.
8 * Copyright (c) 2005-2010 Alan L. Cox <alc@cs.rice.edu>

--- 1158 unchanged lines hidden (view full) ---

1167 if (pmap == kernel_pmap || !CPU_EMPTY(&pmap->pm_active))
1168 pmap_update_pde_invalidate(va, newpde);
1169}
1170#endif /* !SMP */
1171
1172#define PMAP_CLFLUSH_THRESHOLD (2 * 1024 * 1024)
1173
1174void
1/*-
2 * Copyright (c) 1991 Regents of the University of California.
3 * All rights reserved.
4 * Copyright (c) 1994 John S. Dyson
5 * All rights reserved.
6 * Copyright (c) 1994 David Greenman
7 * All rights reserved.
8 * Copyright (c) 2005-2010 Alan L. Cox <alc@cs.rice.edu>

--- 1158 unchanged lines hidden (view full) ---

1167 if (pmap == kernel_pmap || !CPU_EMPTY(&pmap->pm_active))
1168 pmap_update_pde_invalidate(va, newpde);
1169}
1170#endif /* !SMP */
1171
1172#define PMAP_CLFLUSH_THRESHOLD (2 * 1024 * 1024)
1173
1174void
1175pmap_invalidate_cache_range(vm_offset_t sva, vm_offset_t eva)
1175pmap_invalidate_cache_range(vm_offset_t sva, vm_offset_t eva, boolean_t force)
1176{
1177
1176{
1177
1178 KASSERT((sva & PAGE_MASK) == 0,
1179 ("pmap_invalidate_cache_range: sva not page-aligned"));
1180 KASSERT((eva & PAGE_MASK) == 0,
1181 ("pmap_invalidate_cache_range: eva not page-aligned"));
1178 if (force) {
1179 sva &= ~(vm_offset_t)cpu_clflush_line_size;
1180 } else {
1181 KASSERT((sva & PAGE_MASK) == 0,
1182 ("pmap_invalidate_cache_range: sva not page-aligned"));
1183 KASSERT((eva & PAGE_MASK) == 0,
1184 ("pmap_invalidate_cache_range: eva not page-aligned"));
1185 }
1182
1186
1183 if (cpu_feature & CPUID_SS)
1184 ; /* If "Self Snoop" is supported, do nothing. */
1187 if ((cpu_feature & CPUID_SS) != 0 && !force)
1188 ; /* If "Self Snoop" is supported and allowed, do nothing. */
1185 else if ((cpu_feature & CPUID_CLFSH) != 0 &&
1186 eva - sva < PMAP_CLFLUSH_THRESHOLD) {
1187
1188#ifdef DEV_APIC
1189 /*
1190 * XXX: Some CPUs fault, hang, or trash the local APIC
1191 * registers if we use CLFLUSH on the local APIC
1192 * range. The local APIC is always uncached, so we

--- 3966 unchanged lines hidden (view full) ---

5159 else
5160 va = kva_alloc(size);
5161 if (!va)
5162 panic("pmap_mapdev: Couldn't alloc kernel virtual memory");
5163
5164 for (tmpsize = 0; tmpsize < size; tmpsize += PAGE_SIZE)
5165 pmap_kenter_attr(va + tmpsize, pa + tmpsize, mode);
5166 pmap_invalidate_range(kernel_pmap, va, va + tmpsize);
1189 else if ((cpu_feature & CPUID_CLFSH) != 0 &&
1190 eva - sva < PMAP_CLFLUSH_THRESHOLD) {
1191
1192#ifdef DEV_APIC
1193 /*
1194 * XXX: Some CPUs fault, hang, or trash the local APIC
1195 * registers if we use CLFLUSH on the local APIC
1196 * range. The local APIC is always uncached, so we

--- 3966 unchanged lines hidden (view full) ---

5163 else
5164 va = kva_alloc(size);
5165 if (!va)
5166 panic("pmap_mapdev: Couldn't alloc kernel virtual memory");
5167
5168 for (tmpsize = 0; tmpsize < size; tmpsize += PAGE_SIZE)
5169 pmap_kenter_attr(va + tmpsize, pa + tmpsize, mode);
5170 pmap_invalidate_range(kernel_pmap, va, va + tmpsize);
5167 pmap_invalidate_cache_range(va, va + size);
5171 pmap_invalidate_cache_range(va, va + size, FALSE);
5168 return ((void *)(va + offset));
5169}
5170
5171void *
5172pmap_mapdev(vm_paddr_t pa, vm_size_t size)
5173{
5174
5175 return (pmap_mapdev_attr(pa, size, PAT_UNCACHEABLE));

--- 189 unchanged lines hidden (view full) ---

5365 }
5366
5367 /*
5368 * Flush CPU caches to make sure any data isn't cached that
5369 * shouldn't be, etc.
5370 */
5371 if (changed) {
5372 pmap_invalidate_range(kernel_pmap, base, tmpva);
5172 return ((void *)(va + offset));
5173}
5174
5175void *
5176pmap_mapdev(vm_paddr_t pa, vm_size_t size)
5177{
5178
5179 return (pmap_mapdev_attr(pa, size, PAT_UNCACHEABLE));

--- 189 unchanged lines hidden (view full) ---

5369 }
5370
5371 /*
5372 * Flush CPU caches to make sure any data isn't cached that
5373 * shouldn't be, etc.
5374 */
5375 if (changed) {
5376 pmap_invalidate_range(kernel_pmap, base, tmpva);
5373 pmap_invalidate_cache_range(base, tmpva);
5377 pmap_invalidate_cache_range(base, tmpva, FALSE);
5374 }
5375 return (0);
5376}
5377
5378/*
5379 * perform the pmap work for mincore
5380 */
5381int

--- 218 unchanged lines hidden ---
5378 }
5379 return (0);
5380}
5381
5382/*
5383 * perform the pmap work for mincore
5384 */
5385int

--- 218 unchanged lines hidden ---