if_xl.c (48dcbc3370d9f55bda3c5ba2c8b84ab92d27f741) | if_xl.c (7498e81a2df59d1b7de4fbc5283f1373a4ac6131) |
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1/*- 2 * Copyright (c) 1997, 1998, 1999 3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 2193 unchanged lines hidden (view full) --- 2202 2203 XL_LOCK_ASSERT(sc); 2204 2205 while ((txstat = CSR_READ_1(sc, XL_TX_STATUS))) { 2206 if (txstat & XL_TXSTATUS_UNDERRUN || 2207 txstat & XL_TXSTATUS_JABBER || 2208 txstat & XL_TXSTATUS_RECLAIM) { 2209 device_printf(sc->xl_dev, | 1/*- 2 * Copyright (c) 1997, 1998, 1999 3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 2193 unchanged lines hidden (view full) --- 2202 2203 XL_LOCK_ASSERT(sc); 2204 2205 while ((txstat = CSR_READ_1(sc, XL_TX_STATUS))) { 2206 if (txstat & XL_TXSTATUS_UNDERRUN || 2207 txstat & XL_TXSTATUS_JABBER || 2208 txstat & XL_TXSTATUS_RECLAIM) { 2209 device_printf(sc->xl_dev, |
2210 "transmission error: %x\n", txstat); | 2210 "transmission error: 0x%02x\n", txstat); |
2211 CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_TX_RESET); 2212 xl_wait(sc); 2213 if (sc->xl_type == XL_TYPE_905B) { 2214 if (sc->xl_cdata.xl_tx_cnt) { 2215 int i; 2216 struct xl_chain *c; 2217 2218 i = sc->xl_cdata.xl_tx_cons; 2219 c = &sc->xl_cdata.xl_tx_chain[i]; 2220 CSR_WRITE_4(sc, XL_DOWNLIST_PTR, 2221 c->xl_phys); 2222 CSR_WRITE_1(sc, XL_DOWN_POLL, 64); | 2211 CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_TX_RESET); 2212 xl_wait(sc); 2213 if (sc->xl_type == XL_TYPE_905B) { 2214 if (sc->xl_cdata.xl_tx_cnt) { 2215 int i; 2216 struct xl_chain *c; 2217 2218 i = sc->xl_cdata.xl_tx_cons; 2219 c = &sc->xl_cdata.xl_tx_chain[i]; 2220 CSR_WRITE_4(sc, XL_DOWNLIST_PTR, 2221 c->xl_phys); 2222 CSR_WRITE_1(sc, XL_DOWN_POLL, 64); |
2223 sc->xl_wdog_timer = 5; |
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2223 } 2224 } else { | 2224 } 2225 } else { |
2225 if (sc->xl_cdata.xl_tx_head != NULL) | 2226 if (sc->xl_cdata.xl_tx_head != NULL) { |
2226 CSR_WRITE_4(sc, XL_DOWNLIST_PTR, 2227 sc->xl_cdata.xl_tx_head->xl_phys); | 2227 CSR_WRITE_4(sc, XL_DOWNLIST_PTR, 2228 sc->xl_cdata.xl_tx_head->xl_phys); |
2229 sc->xl_wdog_timer = 5; 2230 } |
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2228 } 2229 /* 2230 * Remember to set this for the 2231 * first generation 3c90X chips. 2232 */ 2233 CSR_WRITE_1(sc, XL_TX_FREETHRESH, XL_PACKET_SIZE >> 8); 2234 if (txstat & XL_TXSTATUS_UNDERRUN && 2235 sc->xl_tx_thresh < XL_PACKET_SIZE) { --- 1174 unchanged lines hidden --- | 2231 } 2232 /* 2233 * Remember to set this for the 2234 * first generation 3c90X chips. 2235 */ 2236 CSR_WRITE_1(sc, XL_TX_FREETHRESH, XL_PACKET_SIZE >> 8); 2237 if (txstat & XL_TXSTATUS_UNDERRUN && 2238 sc->xl_tx_thresh < XL_PACKET_SIZE) { --- 1174 unchanged lines hidden --- |