uart.h (d5dba21cf60d22de98652c3c1e187a463db04ce2) uart.h (27d5dc189c8e2eaf1cbe7e47078bf065854ba210)
1/*-
1/*
2 * Copyright (c) 2003 Marcel Moolenaar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * 1. Redistributions of source code must retain the above copyright

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33 * Bus access structure. This structure holds the minimum information needed
34 * to access the UART. The rclk field, although not important to actually
35 * access the UART, is important for baudrate programming, delay loops and
36 * other timing related computations.
37 */
38struct uart_bas {
39 bus_space_tag_t bst;
40 bus_space_handle_t bsh;
2 * Copyright (c) 2003 Marcel Moolenaar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * 1. Redistributions of source code must retain the above copyright

--- 23 unchanged lines hidden (view full) ---

33 * Bus access structure. This structure holds the minimum information needed
34 * to access the UART. The rclk field, although not important to actually
35 * access the UART, is important for baudrate programming, delay loops and
36 * other timing related computations.
37 */
38struct uart_bas {
39 bus_space_tag_t bst;
40 bus_space_handle_t bsh;
41 u_int chan;
42 u_int rclk;
43 u_int regshft;
41 u_int regshft;
42 u_int rclk;
44};
45
46#define uart_regofs(bas, reg) ((reg) << (bas)->regshft)
47
48#define uart_getreg(bas, reg) \
49 bus_space_read_1((bas)->bst, (bas)->bsh, uart_regofs(bas, reg))
50#define uart_setreg(bas, reg, value) \
51 bus_space_write_1((bas)->bst, (bas)->bsh, uart_regofs(bas, reg), value)
52
43};
44
45#define uart_regofs(bas, reg) ((reg) << (bas)->regshft)
46
47#define uart_getreg(bas, reg) \
48 bus_space_read_1((bas)->bst, (bas)->bsh, uart_regofs(bas, reg))
49#define uart_setreg(bas, reg, value) \
50 bus_space_write_1((bas)->bst, (bas)->bsh, uart_regofs(bas, reg), value)
51
52/* 16-bit I/O (e.g. to divisor latch) */
53#define uart_getdreg(bas, reg) \
54 bus_space_read_2((bas)->bst, (bas)->bsh, uart_regofs(bas, reg))
55#define uart_setdreg(bas, reg, value) \
56 bus_space_write_2((bas)->bst, (bas)->bsh, uart_regofs(bas, reg), value)
57
53/*
54 * XXX we don't know the length of the bus space address range in use by
55 * the UART. Since barriers don't use the length field currently, we put
56 * a zero there for now.
57 */
58#define uart_barrier(bas) \
59 bus_space_barrier((bas)->bst, (bas)->bsh, 0, 0, \
60 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
61
62/*
58/*
59 * XXX we don't know the length of the bus space address range in use by
60 * the UART. Since barriers don't use the length field currently, we put
61 * a zero there for now.
62 */
63#define uart_barrier(bas) \
64 bus_space_barrier((bas)->bst, (bas)->bsh, 0, 0, \
65 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
66
67/*
63 * UART device classes.
64 */
65struct uart_class;
66
67extern struct uart_class uart_ns8250_class __attribute__((weak));
68extern struct uart_class uart_quicc_class __attribute__((weak));
69extern struct uart_class uart_sab82532_class __attribute__((weak));
70extern struct uart_class uart_sbbc_class __attribute__((weak));
71extern struct uart_class uart_z8530_class __attribute__((weak));
72
73#ifdef PC98
74struct uart_class *uart_pc98_getdev(u_long port);
75#endif
76
77/*
78 * Device flags.
79 */
80#define UART_FLAGS_CONSOLE(f) ((f) & 0x10)
81#define UART_FLAGS_DBGPORT(f) ((f) & 0x80)
68 * Device flags.
69 */
70#define UART_FLAGS_CONSOLE(f) ((f) & 0x10)
71#define UART_FLAGS_DBGPORT(f) ((f) & 0x80)
82#define UART_FLAGS_FCR_RX_LOW(f) ((f) & 0x100)
83#define UART_FLAGS_FCR_RX_MEDL(f) ((f) & 0x200)
84#define UART_FLAGS_FCR_RX_MEDH(f) ((f) & 0x400)
85#define UART_FLAGS_FCR_RX_HIGH(f) ((f) & 0x800)
86
87/*
88 * Data parity values (magical numbers related to ns8250).
89 */
90#define UART_PARITY_NONE 0
91#define UART_PARITY_ODD 1
92#define UART_PARITY_EVEN 3
93#define UART_PARITY_MARK 5
94#define UART_PARITY_SPACE 7
95
96#endif /* _DEV_UART_H_ */
72
73/*
74 * Data parity values (magical numbers related to ns8250).
75 */
76#define UART_PARITY_NONE 0
77#define UART_PARITY_ODD 1
78#define UART_PARITY_EVEN 3
79#define UART_PARITY_MARK 5
80#define UART_PARITY_SPACE 7
81
82#endif /* _DEV_UART_H_ */