hdac.c (88addcbe26ac074ef66ff226251b0658acf40ce3) hdac.c (6fa8e691a35940743c73d00fd498b970e92c552c)
1/*-
2 * Copyright (c) 2006 Stephane E. Potvin <sepotvin@videotron.ca>
3 * Copyright (c) 2006 Ariff Abdullah <ariff@FreeBSD.org>
4 * Copyright (c) 2008-2012 Alexander Motin <mav@FreeBSD.org>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions

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1334 for (i = 0; i < devcount; i++)
1335 HDAC_PINDUMP(devlist[i]);
1336 hdac_unlock(sc);
1337 free(devlist, M_TEMP);
1338 return (0);
1339}
1340
1341static int
1/*-
2 * Copyright (c) 2006 Stephane E. Potvin <sepotvin@videotron.ca>
3 * Copyright (c) 2006 Ariff Abdullah <ariff@FreeBSD.org>
4 * Copyright (c) 2008-2012 Alexander Motin <mav@FreeBSD.org>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions

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1334 for (i = 0; i < devcount; i++)
1335 HDAC_PINDUMP(devlist[i]);
1336 hdac_unlock(sc);
1337 free(devlist, M_TEMP);
1338 return (0);
1339}
1340
1341static int
1342hdac_data_rate(uint16_t fmt)
1342hdac_mdata_rate(uint16_t fmt)
1343{
1343{
1344 static const int bits[8] = { 8, 16, 20, 24, 32, 32, 32, 32 };
1345 int rate;
1344 static const int mbits[8] = { 8, 16, 32, 32, 32, 32, 32, 32 };
1345 int rate, bits;
1346
1347 if (fmt & (1 << 14))
1348 rate = 44100;
1349 else
1350 rate = 48000;
1351 rate *= ((fmt >> 11) & 0x07) + 1;
1352 rate /= ((fmt >> 8) & 0x07) + 1;
1346
1347 if (fmt & (1 << 14))
1348 rate = 44100;
1349 else
1350 rate = 48000;
1351 rate *= ((fmt >> 11) & 0x07) + 1;
1352 rate /= ((fmt >> 8) & 0x07) + 1;
1353 rate *= ((bits[(fmt >> 4) & 0x03]) * ((fmt & 0x0f) + 1) + 7) / 8;
1354 return (rate);
1353 bits = mbits[(fmt >> 4) & 0x03];
1354 bits *= (fmt & 0x0f) + 1;
1355 return (rate * bits);
1355}
1356
1356}
1357
1358static int
1359hdac_bdata_rate(uint16_t fmt, int output)
1360{
1361 static const int bbits[8] = { 8, 16, 20, 24, 32, 32, 32, 32 };
1362 int rate, bits;
1363
1364 rate = 48000;
1365 rate *= ((fmt >> 11) & 0x07) + 1;
1366 bits = bbits[(fmt >> 4) & 0x03];
1367 bits *= (fmt & 0x0f) + 1;
1368 if (!output)
1369 bits = ((bits + 7) & ~0x07) + 10;
1370 return (rate * bits);
1371}
1372
1357static void
1358hdac_poll_reinit(struct hdac_softc *sc)
1359{
1360 int i, pollticks, min = 1000000;
1361 struct hdac_stream *s;
1362
1363 if (sc->polling == 0)
1364 return;
1365 if (sc->unsol_registered > 0)
1366 min = hz / 2;
1367 for (i = 0; i < sc->num_ss; i++) {
1368 s = &sc->streams[i];
1369 if (s->running == 0)
1370 continue;
1371 pollticks = ((uint64_t)hz * s->blksz) /
1373static void
1374hdac_poll_reinit(struct hdac_softc *sc)
1375{
1376 int i, pollticks, min = 1000000;
1377 struct hdac_stream *s;
1378
1379 if (sc->polling == 0)
1380 return;
1381 if (sc->unsol_registered > 0)
1382 min = hz / 2;
1383 for (i = 0; i < sc->num_ss; i++) {
1384 s = &sc->streams[i];
1385 if (s->running == 0)
1386 continue;
1387 pollticks = ((uint64_t)hz * s->blksz) /
1372 hdac_data_rate(s->format);
1388 (hdac_mdata_rate(s->format) / 8);
1373 pollticks >>= 1;
1374 if (pollticks > hz)
1375 pollticks = hz;
1376 if (pollticks < 1) {
1377 HDA_BOOTVERBOSE(
1378 device_printf(sc->dev,
1379 "poll interval < 1 tick !\n");
1380 );

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1785 break;
1786 }
1787 }
1788 }
1789 return (ss);
1790}
1791
1792static int
1389 pollticks >>= 1;
1390 if (pollticks > hz)
1391 pollticks = hz;
1392 if (pollticks < 1) {
1393 HDA_BOOTVERBOSE(
1394 device_printf(sc->dev,
1395 "poll interval < 1 tick !\n");
1396 );

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1801 break;
1802 }
1803 }
1804 }
1805 return (ss);
1806}
1807
1808static int
1793hdac_stream_alloc(device_t dev, device_t child, int dir, int format,
1809hdac_stream_alloc(device_t dev, device_t child, int dir, int format, int stripe,
1794 uint32_t **dmapos)
1795{
1796 struct hdac_softc *sc = device_get_softc(dev);
1810 uint32_t **dmapos)
1811{
1812 struct hdac_softc *sc = device_get_softc(dev);
1797 int stream, ss;
1813 nid_t cad = (uintptr_t)device_get_ivars(child);
1814 int stream, ss, bw, maxbw, prevbw;
1798
1799 /* Look for empty stream. */
1800 ss = hdac_find_stream(sc, dir, 0);
1801
1802 /* Return if found nothing. */
1803 if (ss < 0)
1804 return (0);
1805
1815
1816 /* Look for empty stream. */
1817 ss = hdac_find_stream(sc, dir, 0);
1818
1819 /* Return if found nothing. */
1820 if (ss < 0)
1821 return (0);
1822
1823 /* Check bus bandwidth. */
1824 bw = hdac_bdata_rate(format, dir);
1825 if (dir == 1) {
1826 bw *= 1 << (sc->num_sdo - stripe);
1827 prevbw = sc->sdo_bw_used;
1828 maxbw = 48000 * 960 * (1 << sc->num_sdo);
1829 } else {
1830 prevbw = sc->codecs[cad].sdi_bw_used;
1831 maxbw = 48000 * 464;
1832 }
1833 HDA_BOOTHVERBOSE(
1834 device_printf(dev, "%dKbps of %dKbps bandwidth used%s\n",
1835 (bw + prevbw) / 1000, maxbw / 1000,
1836 bw + prevbw > maxbw ? " -- OVERFLOW!" : "");
1837 );
1838 if (bw + prevbw > maxbw)
1839 return (0);
1840 if (dir == 1)
1841 sc->sdo_bw_used += bw;
1842 else
1843 sc->codecs[cad].sdi_bw_used += bw;
1844
1806 /* Allocate stream number */
1807 if (ss >= sc->num_iss + sc->num_oss)
1808 stream = 15 - (ss - sc->num_iss + sc->num_oss);
1809 else if (ss >= sc->num_iss)
1810 stream = ss - sc->num_iss + 1;
1811 else
1812 stream = ss + 1;
1813
1814 sc->streams[ss].dev = child;
1815 sc->streams[ss].dir = dir;
1816 sc->streams[ss].stream = stream;
1845 /* Allocate stream number */
1846 if (ss >= sc->num_iss + sc->num_oss)
1847 stream = 15 - (ss - sc->num_iss + sc->num_oss);
1848 else if (ss >= sc->num_iss)
1849 stream = ss - sc->num_iss + 1;
1850 else
1851 stream = ss + 1;
1852
1853 sc->streams[ss].dev = child;
1854 sc->streams[ss].dir = dir;
1855 sc->streams[ss].stream = stream;
1856 sc->streams[ss].bw = bw;
1817 sc->streams[ss].format = format;
1857 sc->streams[ss].format = format;
1858 sc->streams[ss].stripe = stripe;
1818 if (dmapos != NULL) {
1819 if (sc->pos_dma.dma_vaddr != NULL)
1820 *dmapos = (uint32_t *)(sc->pos_dma.dma_vaddr + ss * 8);
1821 else
1822 *dmapos = NULL;
1823 }
1824 return (stream);
1825}
1826
1827static void
1828hdac_stream_free(device_t dev, device_t child, int dir, int stream)
1829{
1830 struct hdac_softc *sc = device_get_softc(dev);
1859 if (dmapos != NULL) {
1860 if (sc->pos_dma.dma_vaddr != NULL)
1861 *dmapos = (uint32_t *)(sc->pos_dma.dma_vaddr + ss * 8);
1862 else
1863 *dmapos = NULL;
1864 }
1865 return (stream);
1866}
1867
1868static void
1869hdac_stream_free(device_t dev, device_t child, int dir, int stream)
1870{
1871 struct hdac_softc *sc = device_get_softc(dev);
1872 nid_t cad = (uintptr_t)device_get_ivars(child);
1831 int ss;
1832
1833 ss = hdac_find_stream(sc, dir, stream);
1834 KASSERT(ss >= 0,
1835 ("Free for not allocated stream (%d/%d)\n", dir, stream));
1873 int ss;
1874
1875 ss = hdac_find_stream(sc, dir, stream);
1876 KASSERT(ss >= 0,
1877 ("Free for not allocated stream (%d/%d)\n", dir, stream));
1878 if (dir == 1)
1879 sc->sdo_bw_used -= sc->streams[ss].bw;
1880 else
1881 sc->codecs[cad].sdi_bw_used -= sc->streams[ss].bw;
1836 sc->streams[ss].stream = 0;
1837 sc->streams[ss].dev = NULL;
1838}
1839
1840static int
1841hdac_stream_start(device_t dev, device_t child,
1842 int dir, int stream, bus_addr_t buf, int blksz, int blkcnt)
1843{

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1870
1871 ctl = HDAC_READ_1(&sc->mem, off + HDAC_SDCTL2);
1872 if (dir)
1873 ctl |= HDAC_SDCTL2_DIR;
1874 else
1875 ctl &= ~HDAC_SDCTL2_DIR;
1876 ctl &= ~HDAC_SDCTL2_STRM_MASK;
1877 ctl |= stream << HDAC_SDCTL2_STRM_SHIFT;
1882 sc->streams[ss].stream = 0;
1883 sc->streams[ss].dev = NULL;
1884}
1885
1886static int
1887hdac_stream_start(device_t dev, device_t child,
1888 int dir, int stream, bus_addr_t buf, int blksz, int blkcnt)
1889{

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1916
1917 ctl = HDAC_READ_1(&sc->mem, off + HDAC_SDCTL2);
1918 if (dir)
1919 ctl |= HDAC_SDCTL2_DIR;
1920 else
1921 ctl &= ~HDAC_SDCTL2_DIR;
1922 ctl &= ~HDAC_SDCTL2_STRM_MASK;
1923 ctl |= stream << HDAC_SDCTL2_STRM_SHIFT;
1924 ctl &= ~HDAC_SDCTL2_STRIPE_MASK;
1925 ctl |= sc->streams[ss].stripe << HDAC_SDCTL2_STRIPE_SHIFT;
1878 HDAC_WRITE_1(&sc->mem, off + HDAC_SDCTL2, ctl);
1879
1880 HDAC_WRITE_2(&sc->mem, off + HDAC_SDFMT, sc->streams[ss].format);
1881
1882 ctl = HDAC_READ_4(&sc->mem, HDAC_INTCTL);
1883 ctl |= 1 << ss;
1884 HDAC_WRITE_4(&sc->mem, HDAC_INTCTL, ctl);
1885

--- 142 unchanged lines hidden --- 		1926 HDAC_WRITE_1(&sc->mem, off + HDAC_SDCTL2, ctl);
1927
1928 HDAC_WRITE_2(&sc->mem, off + HDAC_SDFMT, sc->streams[ss].format);
1929
1930 ctl = HDAC_READ_4(&sc->mem, HDAC_INTCTL);
1931 ctl |= 1 << ss;
1932 HDAC_WRITE_4(&sc->mem, HDAC_INTCTL, ctl);
1933

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