sdhci.c (1829d5da5355930d5cfa8ec8add8ff47dc0bebab) sdhci.c (831f5dcf121a581b913177d44adfca7c77680e73)
1/*-
2 * Copyright (c) 2008 Alexander Motin <mav@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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31#include <sys/bus.h>
32#include <sys/conf.h>
33#include <sys/kernel.h>
34#include <sys/lock.h>
35#include <sys/module.h>
36#include <sys/mutex.h>
37#include <sys/resource.h>
38#include <sys/rman.h>
1/*-
2 * Copyright (c) 2008 Alexander Motin <mav@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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31#include <sys/bus.h>
32#include <sys/conf.h>
33#include <sys/kernel.h>
34#include <sys/lock.h>
35#include <sys/module.h>
36#include <sys/mutex.h>
37#include <sys/resource.h>
38#include <sys/rman.h>
39#include <sys/sysctl.h>
40#include <sys/taskqueue.h>
41
42#include <dev/pci/pcireg.h>
43#include <dev/pci/pcivar.h>
44
45#include <machine/bus.h>
46#include <machine/resource.h>
47#include <machine/stdarg.h>

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147 struct resource *irq_res; /* IRQ resource */
148 int irq_rid;
149 void *intrhand; /* Interrupt handle */
150
151 int num_slots; /* Number of slots on this controller */
152 struct sdhci_slot slots[6];
153};
154
39#include <sys/taskqueue.h>
40
41#include <dev/pci/pcireg.h>
42#include <dev/pci/pcivar.h>
43
44#include <machine/bus.h>
45#include <machine/resource.h>
46#include <machine/stdarg.h>

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146 struct resource *irq_res; /* IRQ resource */
147 int irq_rid;
148 void *intrhand; /* Interrupt handle */
149
150 int num_slots; /* Number of slots on this controller */
151 struct sdhci_slot slots[6];
152};
153
155SYSCTL_NODE(_hw, OID_AUTO, sdhci, CTLFLAG_RD, 0, "sdhci driver");
156
157int sdhci_debug;
158TUNABLE_INT("hw.sdhci.debug", &sdhci_debug);
159SYSCTL_INT(_hw_sdhci, OID_AUTO, debug, CTLFLAG_RW, &sdhci_debug, 0, "Debug level");
160
161static inline uint8_t
162RD1(struct sdhci_slot *slot, bus_size_t off)
163{
164 bus_barrier(slot->mem_res, 0, 0xFF,
165 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
166 return bus_read_1(slot->mem_res, off);
167}
168

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303 /* This is to force an update */
304 clock = slot->clock;
305 slot->clock = 0;
306 sdhci_set_clock(slot, clock);
307 }
308
309 WR1(slot, SDHCI_SOFTWARE_RESET, mask);
310
154static inline uint8_t
155RD1(struct sdhci_slot *slot, bus_size_t off)
156{
157 bus_barrier(slot->mem_res, 0, 0xFF,
158 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
159 return bus_read_1(slot->mem_res, off);
160}
161

--- 134 unchanged lines hidden (view full) ---

296 /* This is to force an update */
297 clock = slot->clock;
298 slot->clock = 0;
299 sdhci_set_clock(slot, clock);
300 }
301
302 WR1(slot, SDHCI_SOFTWARE_RESET, mask);
303
311 if (mask & SDHCI_RESET_ALL) {
304 if (mask & SDHCI_RESET_ALL)
312 slot->clock = 0;
305 slot->clock = 0;
313 slot->power = 0;
314 }
315
316 /* Wait max 100 ms */
317 timeout = 100;
318 /* Controller clears the bits when it's done */
319 while ((res = RD1(slot, SDHCI_SOFTWARE_RESET)) & mask) {
320 if (timeout == 0) {
321 slot_printf(slot,
322 "Reset 0x%x never completed - 0x%x.\n",

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736 subclass == PCIS_BASEPERIPH_SDHC &&
737 progif != PCI_SDHCI_IFDMA)
738 slot->opt &= ~SDHCI_HAVE_DMA;
739 if (sc->quirks & SDHCI_QUIRK_BROKEN_DMA)
740 slot->opt &= ~SDHCI_HAVE_DMA;
741 if (sc->quirks & SDHCI_QUIRK_FORCE_DMA)
742 slot->opt |= SDHCI_HAVE_DMA;
743
306
307 /* Wait max 100 ms */
308 timeout = 100;
309 /* Controller clears the bits when it's done */
310 while ((res = RD1(slot, SDHCI_SOFTWARE_RESET)) & mask) {
311 if (timeout == 0) {
312 slot_printf(slot,
313 "Reset 0x%x never completed - 0x%x.\n",

--- 413 unchanged lines hidden (view full) ---

727 subclass == PCIS_BASEPERIPH_SDHC &&
728 progif != PCI_SDHCI_IFDMA)
729 slot->opt &= ~SDHCI_HAVE_DMA;
730 if (sc->quirks & SDHCI_QUIRK_BROKEN_DMA)
731 slot->opt &= ~SDHCI_HAVE_DMA;
732 if (sc->quirks & SDHCI_QUIRK_FORCE_DMA)
733 slot->opt |= SDHCI_HAVE_DMA;
734
744 if (bootverbose || sdhci_debug) {
735 if (bootverbose) {
745 slot_printf(slot, "%uMHz%s 4bits%s%s%s %s\n",
746 slot->max_clk / 1000000,
747 (caps & SDHCI_CAN_DO_HISPD) ? " HS" : "",
748 (caps & SDHCI_CAN_VDD_330) ? " 3.3V" : "",
749 (caps & SDHCI_CAN_VDD_300) ? " 3.0V" : "",
750 (caps & SDHCI_CAN_VDD_180) ? " 1.8V" : "",
751 (slot->opt & SDHCI_HAVE_DMA) ? "DMA" : "PIO");
752 sdhci_dumpregs(slot);

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806 bus_release_resource(dev, SYS_RES_MEMORY,
807 slot->mem_rid, slot->mem_res);
808 SDHCI_LOCK_DESTROY(slot);
809 }
810 return (0);
811}
812
813static int
736 slot_printf(slot, "%uMHz%s 4bits%s%s%s %s\n",
737 slot->max_clk / 1000000,
738 (caps & SDHCI_CAN_DO_HISPD) ? " HS" : "",
739 (caps & SDHCI_CAN_VDD_330) ? " 3.3V" : "",
740 (caps & SDHCI_CAN_VDD_300) ? " 3.0V" : "",
741 (caps & SDHCI_CAN_VDD_180) ? " 1.8V" : "",
742 (slot->opt & SDHCI_HAVE_DMA) ? "DMA" : "PIO");
743 sdhci_dumpregs(slot);

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797 bus_release_resource(dev, SYS_RES_MEMORY,
798 slot->mem_rid, slot->mem_res);
799 SDHCI_LOCK_DESTROY(slot);
800 }
801 return (0);
802}
803
804static int
814sdhci_suspend(device_t dev)
815{
816 struct sdhci_softc *sc = device_get_softc(dev);
817 int i, err;
818
819 err = bus_generic_suspend(dev);
820 if (err)
821 return (err);
822 for (i = 0; i < sc->num_slots; i++)
823 sdhci_reset(&sc->slots[i], SDHCI_RESET_ALL);
824 return (0);
825}
826
827static int
828sdhci_resume(device_t dev)
829{
830 struct sdhci_softc *sc = device_get_softc(dev);
831 int i;
832
833 for (i = 0; i < sc->num_slots; i++)
834 sdhci_init(&sc->slots[i]);
835 return (bus_generic_resume(dev));
836}
837
838static int
839sdhci_update_ios(device_t brdev, device_t reqdev)
840{
841 struct sdhci_slot *slot = device_get_ivars(reqdev);
842 struct mmc_ios *ios = &slot->host.ios;
843
844 SDHCI_LOCK(slot);
845 /* Do full reset on bus power down to clear from any state. */
846 if (ios->power_mode == power_off) {

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908 slot->req = NULL;
909 slot->curcmd = NULL;
910 req->done(req);
911 return;
912 }
913
914 /* Read controller present state. */
915 state = RD4(slot, SDHCI_PRESENT_STATE);
805sdhci_update_ios(device_t brdev, device_t reqdev)
806{
807 struct sdhci_slot *slot = device_get_ivars(reqdev);
808 struct mmc_ios *ios = &slot->host.ios;
809
810 SDHCI_LOCK(slot);
811 /* Do full reset on bus power down to clear from any state. */
812 if (ios->power_mode == power_off) {

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874 slot->req = NULL;
875 slot->curcmd = NULL;
876 req->done(req);
877 return;
878 }
879
880 /* Read controller present state. */
881 state = RD4(slot, SDHCI_PRESENT_STATE);
916 /* Do not issue command if there is no card, clock or power.
917 * Controller will not detect timeout without clock active. */
918 if ((state & SDHCI_CARD_PRESENT) == 0 ||
919 slot->power == 0 ||
920 slot->clock == 0) {
882 /* Do not issue command if there is no card. */
883 if ((state & SDHCI_CARD_PRESENT) == 0) {
921 cmd->error = MMC_ERR_FAILED;
922 slot->req = NULL;
923 slot->curcmd = NULL;
924 req->done(req);
925 return;
926 }
927 /* Always wait for free CMD bus. */
928 mask = SDHCI_CMD_INHIBIT;

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1148 }
1149/* We don't need this until using Auto-CMD12 feature
1150 if (!(slot->flags & STOP_STARTED) && req->stop) {
1151 slot->flags |= STOP_STARTED;
1152 sdhci_start_command(slot, req->stop);
1153 return;
1154 }
1155*/
884 cmd->error = MMC_ERR_FAILED;
885 slot->req = NULL;
886 slot->curcmd = NULL;
887 req->done(req);
888 return;
889 }
890 /* Always wait for free CMD bus. */
891 mask = SDHCI_CMD_INHIBIT;

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1111 }
1112/* We don't need this until using Auto-CMD12 feature
1113 if (!(slot->flags & STOP_STARTED) && req->stop) {
1114 slot->flags |= STOP_STARTED;
1115 sdhci_start_command(slot, req->stop);
1116 return;
1117 }
1118*/
1156 if (sdhci_debug > 1)
1157 slot_printf(slot, "result: %d\n", req->cmd->error);
1158 if (!req->cmd->error &&
1159 (slot->sc->quirks & SDHCI_QUIRK_RESET_AFTER_REQUEST)) {
1119 if (req->cmd->error) {
1120 if (bootverbose) {
1121 slot_printf(slot,
1122 "Command error %d (opcode %u arg %u flags %u "
1123 "dlen %u dflags %u)\n",
1124 req->cmd->error, req->cmd->opcode, req->cmd->arg,
1125 req->cmd->flags,
1126 (req->cmd->data)?(u_int)req->cmd->data->len:0,
1127 (req->cmd->data)?(u_int)req->cmd->data->flags:0);
1128 }
1129 } else if (slot->sc->quirks & SDHCI_QUIRK_RESET_AFTER_REQUEST) {
1160 sdhci_reset(slot, SDHCI_RESET_CMD);
1161 sdhci_reset(slot, SDHCI_RESET_DATA);
1162 }
1163
1164 /* We must be done -- bad idea to do this while locked? */
1165 slot->req = NULL;
1166 slot->curcmd = NULL;
1167 req->done(req);

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1172{
1173 struct sdhci_slot *slot = device_get_ivars(reqdev);
1174
1175 SDHCI_LOCK(slot);
1176 if (slot->req != NULL) {
1177 SDHCI_UNLOCK(slot);
1178 return (EBUSY);
1179 }
1130 sdhci_reset(slot, SDHCI_RESET_CMD);
1131 sdhci_reset(slot, SDHCI_RESET_DATA);
1132 }
1133
1134 /* We must be done -- bad idea to do this while locked? */
1135 slot->req = NULL;
1136 slot->curcmd = NULL;
1137 req->done(req);

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1142{
1143 struct sdhci_slot *slot = device_get_ivars(reqdev);
1144
1145 SDHCI_LOCK(slot);
1146 if (slot->req != NULL) {
1147 SDHCI_UNLOCK(slot);
1148 return (EBUSY);
1149 }
1180 if (sdhci_debug > 1) {
1181 slot_printf(slot, "CMD%u arg %#x flags %#x dlen %u dflags %#x\n",
1182 req->cmd->opcode, req->cmd->arg, req->cmd->flags,
1183 (req->cmd->data)?(u_int)req->cmd->data->len:0,
1184 (req->cmd->data)?req->cmd->data->flags:0);
1185 }
1150/* printf("%s cmd op %u arg %u flags %u data %ju\n", __func__,
1151 req->cmd->opcode, req->cmd->arg, req->cmd->flags,
1152 (req->cmd->data)?req->cmd->data->len:0); */
1186 slot->req = req;
1187 slot->flags = 0;
1188 sdhci_start(slot);
1189 SDHCI_UNLOCK(slot);
1153 slot->req = req;
1154 slot->flags = 0;
1155 sdhci_start(slot);
1156 SDHCI_UNLOCK(slot);
1190 if (dumping) {
1191 while (slot->req != NULL) {
1192 sdhci_intr(slot->sc);
1193 DELAY(10);
1194 }
1195 }
1196 return (0);
1197}
1198
1199static int
1200sdhci_get_ro(device_t brdev, device_t reqdev)
1201{
1202 struct sdhci_slot *slot = device_get_ivars(reqdev);
1203 uint32_t val;

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1211static int
1212sdhci_acquire_host(device_t brdev, device_t reqdev)
1213{
1214 struct sdhci_slot *slot = device_get_ivars(reqdev);
1215 int err = 0;
1216
1217 SDHCI_LOCK(slot);
1218 while (slot->bus_busy)
1157 return (0);
1158}
1159
1160static int
1161sdhci_get_ro(device_t brdev, device_t reqdev)
1162{
1163 struct sdhci_slot *slot = device_get_ivars(reqdev);
1164 uint32_t val;

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1172static int
1173sdhci_acquire_host(device_t brdev, device_t reqdev)
1174{
1175 struct sdhci_slot *slot = device_get_ivars(reqdev);
1176 int err = 0;
1177
1178 SDHCI_LOCK(slot);
1179 while (slot->bus_busy)
1219 msleep(slot, &slot->mtx, 0, "sdhciah", 0);
1180 msleep(slot, &slot->mtx, PZERO, "sdhciah", hz / 5);
1220 slot->bus_busy++;
1221 /* Activate led. */
1222 WR1(slot, SDHCI_HOST_CONTROL, slot->hostctrl |= SDHCI_CTRL_LED);
1223 SDHCI_UNLOCK(slot);
1224 return (err);
1225}
1226
1227static int
1228sdhci_release_host(device_t brdev, device_t reqdev)
1229{
1230 struct sdhci_slot *slot = device_get_ivars(reqdev);
1231
1232 SDHCI_LOCK(slot);
1233 /* Deactivate led. */
1234 WR1(slot, SDHCI_HOST_CONTROL, slot->hostctrl &= ~SDHCI_CTRL_LED);
1235 slot->bus_busy--;
1181 slot->bus_busy++;
1182 /* Activate led. */
1183 WR1(slot, SDHCI_HOST_CONTROL, slot->hostctrl |= SDHCI_CTRL_LED);
1184 SDHCI_UNLOCK(slot);
1185 return (err);
1186}
1187
1188static int
1189sdhci_release_host(device_t brdev, device_t reqdev)
1190{
1191 struct sdhci_slot *slot = device_get_ivars(reqdev);
1192
1193 SDHCI_LOCK(slot);
1194 /* Deactivate led. */
1195 WR1(slot, SDHCI_HOST_CONTROL, slot->hostctrl &= ~SDHCI_CTRL_LED);
1196 slot->bus_busy--;
1236 SDHCI_UNLOCK(slot);
1237 wakeup(slot);
1197 wakeup(slot);
1198 SDHCI_UNLOCK(slot);
1238 return (0);
1239}
1240
1241static void
1242sdhci_cmd_irq(struct sdhci_slot *slot, uint32_t intmask)
1243{
1244
1245 if (!slot->curcmd) {

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1367
1368 SDHCI_LOCK(slot);
1369 /* Read slot interrupt status. */
1370 intmask = RD4(slot, SDHCI_INT_STATUS);
1371 if (intmask == 0 || intmask == 0xffffffff) {
1372 SDHCI_UNLOCK(slot);
1373 continue;
1374 }
1199 return (0);
1200}
1201
1202static void
1203sdhci_cmd_irq(struct sdhci_slot *slot, uint32_t intmask)
1204{
1205
1206 if (!slot->curcmd) {

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1328
1329 SDHCI_LOCK(slot);
1330 /* Read slot interrupt status. */
1331 intmask = RD4(slot, SDHCI_INT_STATUS);
1332 if (intmask == 0 || intmask == 0xffffffff) {
1333 SDHCI_UNLOCK(slot);
1334 continue;
1335 }
1375 if (sdhci_debug > 2)
1376 slot_printf(slot, "Interrupt %#x\n", intmask);
1377
1336/*
1337 slot_printf(slot, "got interrupt %x\n", intmask);
1338*/
1378 /* Handle card presence interrupts. */
1379 if (intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE)) {
1380 WR4(slot, SDHCI_INT_STATUS, intmask &
1381 (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE));
1382
1383 if (intmask & SDHCI_INT_CARD_REMOVE) {
1339 /* Handle card presence interrupts. */
1340 if (intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE)) {
1341 WR4(slot, SDHCI_INT_STATUS, intmask &
1342 (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE));
1343
1344 if (intmask & SDHCI_INT_CARD_REMOVE) {
1384 if (bootverbose || sdhci_debug)
1345 if (bootverbose)
1385 slot_printf(slot, "Card removed\n");
1386 callout_stop(&slot->card_callout);
1387 taskqueue_enqueue(taskqueue_swi_giant,
1388 &slot->card_task);
1389 }
1390 if (intmask & SDHCI_INT_CARD_INSERT) {
1346 slot_printf(slot, "Card removed\n");
1347 callout_stop(&slot->card_callout);
1348 taskqueue_enqueue(taskqueue_swi_giant,
1349 &slot->card_task);
1350 }
1351 if (intmask & SDHCI_INT_CARD_INSERT) {
1391 if (bootverbose || sdhci_debug)
1352 if (bootverbose)
1392 slot_printf(slot, "Card inserted\n");
1393 callout_reset(&slot->card_callout, hz / 2,
1394 sdhci_card_delay, slot);
1395 }
1396 intmask &= ~(SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE);
1397 }
1398 /* Handle command interrupts. */
1399 if (intmask & SDHCI_INT_CMD_MASK) {

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1428 sdhci_dumpregs(slot);
1429 }
1430
1431 SDHCI_UNLOCK(slot);
1432 }
1433}
1434
1435static int
1353 slot_printf(slot, "Card inserted\n");
1354 callout_reset(&slot->card_callout, hz / 2,
1355 sdhci_card_delay, slot);
1356 }
1357 intmask &= ~(SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE);
1358 }
1359 /* Handle command interrupts. */
1360 if (intmask & SDHCI_INT_CMD_MASK) {

--- 28 unchanged lines hidden (view full) ---

1389 sdhci_dumpregs(slot);
1390 }
1391
1392 SDHCI_UNLOCK(slot);
1393 }
1394}
1395
1396static int
1436sdhci_read_ivar(device_t bus, device_t child, int which, uintptr_t *result)
1397sdhci_read_ivar(device_t bus, device_t child, int which, u_char *result)
1437{
1438 struct sdhci_slot *slot = device_get_ivars(child);
1439
1440 switch (which) {
1441 default:
1442 return (EINVAL);
1443 case MMCBR_IVAR_BUS_MODE:
1444 *(int *)result = slot->host.ios.bus_mode;

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1474 *(int *)result = slot->host.ios.vdd;
1475 break;
1476 case MMCBR_IVAR_CAPS:
1477 *(int *)result = slot->host.caps;
1478 break;
1479 case MMCBR_IVAR_TIMING:
1480 *(int *)result = slot->host.ios.timing;
1481 break;
1398{
1399 struct sdhci_slot *slot = device_get_ivars(child);
1400
1401 switch (which) {
1402 default:
1403 return (EINVAL);
1404 case MMCBR_IVAR_BUS_MODE:
1405 *(int *)result = slot->host.ios.bus_mode;

--- 29 unchanged lines hidden (view full) ---

1435 *(int *)result = slot->host.ios.vdd;
1436 break;
1437 case MMCBR_IVAR_CAPS:
1438 *(int *)result = slot->host.caps;
1439 break;
1440 case MMCBR_IVAR_TIMING:
1441 *(int *)result = slot->host.ios.timing;
1442 break;
1482 case MMCBR_IVAR_MAX_DATA:
1483 *(int *)result = 65535;
1484 break;
1485 }
1486 return (0);
1487}
1488
1489static int
1490sdhci_write_ivar(device_t bus, device_t child, int which, uintptr_t value)
1491{
1492 struct sdhci_slot *slot = device_get_ivars(child);

--- 38 unchanged lines hidden (view full) ---

1531 break;
1532 case MMCBR_IVAR_TIMING:
1533 slot->host.ios.timing = value;
1534 break;
1535 case MMCBR_IVAR_CAPS:
1536 case MMCBR_IVAR_HOST_OCR:
1537 case MMCBR_IVAR_F_MIN:
1538 case MMCBR_IVAR_F_MAX:
1443 }
1444 return (0);
1445}
1446
1447static int
1448sdhci_write_ivar(device_t bus, device_t child, int which, uintptr_t value)
1449{
1450 struct sdhci_slot *slot = device_get_ivars(child);

--- 38 unchanged lines hidden (view full) ---

1489 break;
1490 case MMCBR_IVAR_TIMING:
1491 slot->host.ios.timing = value;
1492 break;
1493 case MMCBR_IVAR_CAPS:
1494 case MMCBR_IVAR_HOST_OCR:
1495 case MMCBR_IVAR_F_MIN:
1496 case MMCBR_IVAR_F_MAX:
1539 case MMCBR_IVAR_MAX_DATA:
1540 return (EINVAL);
1541 }
1542 return (0);
1543}
1544
1545static device_method_t sdhci_methods[] = {
1546 /* device_if */
1547 DEVMETHOD(device_probe, sdhci_probe),
1548 DEVMETHOD(device_attach, sdhci_attach),
1549 DEVMETHOD(device_detach, sdhci_detach),
1497 return (EINVAL);
1498 }
1499 return (0);
1500}
1501
1502static device_method_t sdhci_methods[] = {
1503 /* device_if */
1504 DEVMETHOD(device_probe, sdhci_probe),
1505 DEVMETHOD(device_attach, sdhci_attach),
1506 DEVMETHOD(device_detach, sdhci_detach),
1550 DEVMETHOD(device_suspend, sdhci_suspend),
1551 DEVMETHOD(device_resume, sdhci_resume),
1552
1553 /* Bus interface */
1554 DEVMETHOD(bus_read_ivar, sdhci_read_ivar),
1555 DEVMETHOD(bus_write_ivar, sdhci_write_ivar),
1556
1557 /* mmcbr_if */
1558 DEVMETHOD(mmcbr_update_ios, sdhci_update_ios),
1559 DEVMETHOD(mmcbr_request, sdhci_request),

--- 16 unchanged lines hidden --- 		1507
1508 /* Bus interface */
1509 DEVMETHOD(bus_read_ivar, sdhci_read_ivar),
1510 DEVMETHOD(bus_write_ivar, sdhci_write_ivar),
1511
1512 /* mmcbr_if */
1513 DEVMETHOD(mmcbr_update_ios, sdhci_update_ios),
1514 DEVMETHOD(mmcbr_request, sdhci_request),

--- 16 unchanged lines hidden ---