if_re.c (4ee1666125a3f9adefe6651df8bd0cb5733771c2) if_re.c (9bac70b85175d16cc91c1e707966d6261e64a160)
1/*
2 * Copyright (c) 1997, 1998-2003
3 * Bill Paul <wpaul@windriver.com>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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388 u_int32_t rval;
389 int i;
390
391 if (phy != 1)
392 return(0);
393
394 sc = device_get_softc(dev);
395
1/*
2 * Copyright (c) 1997, 1998-2003
3 * Bill Paul <wpaul@windriver.com>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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388 u_int32_t rval;
389 int i;
390
391 if (phy != 1)
392 return(0);
393
394 sc = device_get_softc(dev);
395
396 /* Let the rgephy driver read the GMEDIASTAT register */
397
398 if (reg == RL_GMEDIASTAT) {
399 rval = CSR_READ_1(sc, RL_GMEDIASTAT);
400 return(rval);
401 }
402
396 CSR_WRITE_4(sc, RL_PHYAR, reg << 16);
397 DELAY(1000);
398
399 for (i = 0; i < RL_TIMEOUT; i++) {
400 rval = CSR_READ_4(sc, RL_PHYAR);
401 if (rval & RL_PHYAR_BUSY)
402 break;
403 DELAY(100);

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418{
419 struct rl_softc *sc;
420 u_int32_t rval;
421 int i;
422
423 sc = device_get_softc(dev);
424
425 CSR_WRITE_4(sc, RL_PHYAR, (reg << 16) |
403 CSR_WRITE_4(sc, RL_PHYAR, reg << 16);
404 DELAY(1000);
405
406 for (i = 0; i < RL_TIMEOUT; i++) {
407 rval = CSR_READ_4(sc, RL_PHYAR);
408 if (rval & RL_PHYAR_BUSY)
409 break;
410 DELAY(100);

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425{
426 struct rl_softc *sc;
427 u_int32_t rval;
428 int i;
429
430 sc = device_get_softc(dev);
431
432 CSR_WRITE_4(sc, RL_PHYAR, (reg << 16) |
426 (data | RL_PHYAR_PHYDATA) | RL_PHYAR_BUSY);
433 (data & RL_PHYAR_PHYDATA) | RL_PHYAR_BUSY);
427 DELAY(1000);
428
429 for (i = 0; i < RL_TIMEOUT; i++) {
430 rval = CSR_READ_4(sc, RL_PHYAR);
431 if (!(rval & RL_PHYAR_BUSY))
432 break;
433 DELAY(100);
434 }

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1143 if (sc->rl_irq == NULL) {
1144 printf("re%d: couldn't map interrupt\n", unit);
1145 error = ENXIO;
1146 goto fail;
1147 }
1148
1149 /* Reset the adapter. */
1150 re_reset(sc);
434 DELAY(1000);
435
436 for (i = 0; i < RL_TIMEOUT; i++) {
437 rval = CSR_READ_4(sc, RL_PHYAR);
438 if (!(rval & RL_PHYAR_BUSY))
439 break;
440 DELAY(100);
441 }

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1150 if (sc->rl_irq == NULL) {
1151 printf("re%d: couldn't map interrupt\n", unit);
1152 error = ENXIO;
1153 goto fail;
1154 }
1155
1156 /* Reset the adapter. */
1157 re_reset(sc);
1158 CSR_WRITE_1(sc, RL_EECMD, RL_EEMODE_PROGRAM);
1151 sc->rl_eecmd_read = RL_EECMD_READ_6BIT;
1152 re_read_eeprom(sc, (caddr_t)&re_did, 0, 1, 0);
1153 if (re_did != 0x8129)
1154 sc->rl_eecmd_read = RL_EECMD_READ_8BIT;
1155
1156 /*
1157 * Get station address from the EEPROM.
1158 */
1159 re_read_eeprom(sc, (caddr_t)as, RL_EE_EADDR, 3, 0);
1160 for (i = 0; i < 3; i++) {
1161 eaddr[(i * 2) + 0] = as[i] & 0xff;
1162 eaddr[(i * 2) + 1] = as[i] >> 8;
1163 }
1164
1159 sc->rl_eecmd_read = RL_EECMD_READ_6BIT;
1160 re_read_eeprom(sc, (caddr_t)&re_did, 0, 1, 0);
1161 if (re_did != 0x8129)
1162 sc->rl_eecmd_read = RL_EECMD_READ_8BIT;
1163
1164 /*
1165 * Get station address from the EEPROM.
1166 */
1167 re_read_eeprom(sc, (caddr_t)as, RL_EE_EADDR, 3, 0);
1168 for (i = 0; i < 3; i++) {
1169 eaddr[(i * 2) + 0] = as[i] & 0xff;
1170 eaddr[(i * 2) + 1] = as[i] >> 8;
1171 }
1172
1173 CSR_WRITE_1(sc, RL_EECMD, RL_EEMODE_OFF);
1174
1165 /*
1166 * A RealTek chip was detected. Inform the world.
1167 */
1168 printf("re%d: Ethernet address: %6D\n", unit, eaddr, ":");
1169
1170 sc->rl_unit = unit;
1171 bcopy(eaddr, (char *)&sc->arpcom.ac_enaddr, ETHER_ADDR_LEN);
1172

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1775
1776 if (sc->suspended) {
1777 return;
1778 }
1779
1780 RL_LOCK(sc);
1781 ifp = &sc->arpcom.ac_if;
1782
1175 /*
1176 * A RealTek chip was detected. Inform the world.
1177 */
1178 printf("re%d: Ethernet address: %6D\n", unit, eaddr, ":");
1179
1180 sc->rl_unit = unit;
1181 bcopy(eaddr, (char *)&sc->arpcom.ac_enaddr, ETHER_ADDR_LEN);
1182

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1785
1786 if (sc->suspended) {
1787 return;
1788 }
1789
1790 RL_LOCK(sc);
1791 ifp = &sc->arpcom.ac_if;
1792
1793 if (!(ifp->if_flags & IFF_UP)) {
1794 RL_UNLOCK(sc);
1795 return;
1796 }
1797
1783#ifdef DEVICE_POLLING
1784 if (ifp->if_flags & IFF_POLLING)
1785 goto done;
1786 if (ether_poll_register(re_poll, ifp)) { /* ok, disable interrupts */
1787 CSR_WRITE_2(sc, RL_IMR, 0x0000);
1788 re_poll(ifp, 0, 1);
1789 goto done;
1790 }

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1798#ifdef DEVICE_POLLING
1799 if (ifp->if_flags & IFF_POLLING)
1800 goto done;
1801 if (ether_poll_register(re_poll, ifp)) { /* ok, disable interrupts */
1802 CSR_WRITE_2(sc, RL_IMR, 0x0000);
1803 re_poll(ifp, 0, 1);
1804 goto done;
1805 }

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