pci_pci.c (7757a1b4dc60696d9a95137ee0a2accd4ee680f4) pci_pci.c (809923ca0223de4c76830cc064655b8fac7bb0fd)
1/*-
2 * Copyright (c) 1994,1995 Stefan Esser, Wolfgang StanglMeier
3 * Copyright (c) 2000 Michael Smith <msmith@freebsd.org>
4 * Copyright (c) 2000 BSDi
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions

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437{
438 pci_addr_t max;
439 device_t dev;
440 uint32_t val;
441
442 dev = sc->dev;
443
444 if (pci_clear_pcib) {
1/*-
2 * Copyright (c) 1994,1995 Stefan Esser, Wolfgang StanglMeier
3 * Copyright (c) 2000 Michael Smith <msmith@freebsd.org>
4 * Copyright (c) 2000 BSDi
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions

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437{
438 pci_addr_t max;
439 device_t dev;
440 uint32_t val;
441
442 dev = sc->dev;
443
444 if (pci_clear_pcib) {
445 pci_write_config(dev, PCIR_IOBASEL_1, 0xff, 1);
446 pci_write_config(dev, PCIR_IOBASEH_1, 0xffff, 2);
447 pci_write_config(dev, PCIR_IOLIMITL_1, 0, 1);
448 pci_write_config(dev, PCIR_IOLIMITH_1, 0, 2);
449 pci_write_config(dev, PCIR_MEMBASE_1, 0xffff, 2);
450 pci_write_config(dev, PCIR_MEMLIMIT_1, 0, 2);
451 pci_write_config(dev, PCIR_PMBASEL_1, 0xffff, 2);
452 pci_write_config(dev, PCIR_PMBASEH_1, 0xffffffff, 4);
453 pci_write_config(dev, PCIR_PMLIMITL_1, 0, 2);
454 pci_write_config(dev, PCIR_PMLIMITH_1, 0, 4);
445 pcib_bridge_init(dev);
455 }
456
457 /* Determine if the I/O port window is implemented. */
458 val = pci_read_config(dev, PCIR_IOBASEL_1, 1);
459 if (val == 0) {
460 /*
461 * If 'val' is zero, then only 16-bits of I/O space
462 * are supported.

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1110int
1111pcib_resume(device_t dev)
1112{
1113
1114 pcib_cfg_restore(device_get_softc(dev));
1115 return (bus_generic_resume(dev));
1116}
1117
446 }
447
448 /* Determine if the I/O port window is implemented. */
449 val = pci_read_config(dev, PCIR_IOBASEL_1, 1);
450 if (val == 0) {
451 /*
452 * If 'val' is zero, then only 16-bits of I/O space
453 * are supported.

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1101int
1102pcib_resume(device_t dev)
1103{
1104
1105 pcib_cfg_restore(device_get_softc(dev));
1106 return (bus_generic_resume(dev));
1107}
1108
1109void
1110pcib_bridge_init(device_t dev)
1111{
1112 pci_write_config(dev, PCIR_IOBASEL_1, 0xff, 1);
1113 pci_write_config(dev, PCIR_IOBASEH_1, 0xffff, 2);
1114 pci_write_config(dev, PCIR_IOLIMITL_1, 0, 1);
1115 pci_write_config(dev, PCIR_IOLIMITH_1, 0, 2);
1116 pci_write_config(dev, PCIR_MEMBASE_1, 0xffff, 2);
1117 pci_write_config(dev, PCIR_MEMLIMIT_1, 0, 2);
1118 pci_write_config(dev, PCIR_PMBASEL_1, 0xffff, 2);
1119 pci_write_config(dev, PCIR_PMBASEH_1, 0xffffffff, 4);
1120 pci_write_config(dev, PCIR_PMLIMITL_1, 0, 2);
1121 pci_write_config(dev, PCIR_PMLIMITH_1, 0, 4);
1122}
1123
1118int
1119pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
1120{
1121 struct pcib_softc *sc = device_get_softc(dev);
1122
1123 switch (which) {
1124 case PCIB_IVAR_DOMAIN:
1125 *result = sc->domain;

--- 987 unchanged lines hidden --- 		1124int
1125pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
1126{
1127 struct pcib_softc *sc = device_get_softc(dev);
1128
1129 switch (which) {
1130 case PCIB_IVAR_DOMAIN:
1131 *result = sc->domain;

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