pci_iov.c (98e0ffaefb0f241cda3a72395d3be04192ae0d47) pci_iov.c (f3bb92515317f9b66fca73deca375a79d49dc54a)
1/*-
2 * Copyright (c) 2013-2015 Sandvine Inc. All rights reserved.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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48#include <machine/bus.h>
49#include <machine/stdarg.h>
50
51#include <sys/nv.h>
52#include <sys/iov_schema.h>
53
54#include <dev/pci/pcireg.h>
55#include <dev/pci/pcivar.h>
1/*-
2 * Copyright (c) 2013-2015 Sandvine Inc. All rights reserved.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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48#include <machine/bus.h>
49#include <machine/stdarg.h>
50
51#include <sys/nv.h>
52#include <sys/iov_schema.h>
53
54#include <dev/pci/pcireg.h>
55#include <dev/pci/pcivar.h>
56#include <dev/pci/pci_iov.h>
56#include <dev/pci/pci_private.h>
57#include <dev/pci/pci_iov_private.h>
58#include <dev/pci/schema_private.h>
59
57#include <dev/pci/pci_private.h>
58#include <dev/pci/pci_iov_private.h>
59#include <dev/pci/schema_private.h>
60
60#include "pci_if.h"
61#include "pcib_if.h"
62
63static MALLOC_DEFINE(M_SRIOV, "sr_iov", "PCI SR-IOV allocations");
64
65static d_ioctl_t pci_iov_ioctl;
66
67static struct cdevsw iov_cdevsw = {
68 .d_version = D_VERSION,

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478 if (!(page_size & page_cap))
479 return (ENXIO);
480
481 IOV_WRITE(dinfo, PCIR_SRIOV_PAGE_SIZE, page_size, 4);
482 return (0);
483}
484
485static int
61#include "pcib_if.h"
62
63static MALLOC_DEFINE(M_SRIOV, "sr_iov", "PCI SR-IOV allocations");
64
65static d_ioctl_t pci_iov_ioctl;
66
67static struct cdevsw iov_cdevsw = {
68 .d_version = D_VERSION,

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478 if (!(page_size & page_cap))
479 return (ENXIO);
480
481 IOV_WRITE(dinfo, PCIR_SRIOV_PAGE_SIZE, page_size, 4);
482 return (0);
483}
484
485static int
486pci_init_iov(device_t dev, uint16_t num_vfs, const nvlist_t *config)
486pci_iov_init(device_t dev, uint16_t num_vfs, const nvlist_t *config)
487{
488 const nvlist_t *device, *driver_config;
489
490 device = nvlist_get_nvlist(config, PF_CONFIG_NAME);
491 driver_config = nvlist_get_nvlist(device, DRIVER_CONFIG_NAME);
487{
488 const nvlist_t *device, *driver_config;
489
490 device = nvlist_get_nvlist(config, PF_CONFIG_NAME);
491 driver_config = nvlist_get_nvlist(device, DRIVER_CONFIG_NAME);
492 return (PCI_INIT_IOV(dev, num_vfs, driver_config));
492 return (PCI_IOV_INIT(dev, num_vfs, driver_config));
493}
494
495static int
496pci_iov_init_rman(device_t pf, struct pcicfg_iov *iov)
497{
498 int error;
499
500 iov->rman.rm_start = 0;

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590
591 vfinfo = device_get_ivars(vf);
592
593 vfinfo->cfg.iov = iov;
594 vfinfo->cfg.vf.index = i;
595
596 pci_iov_add_bars(iov, vfinfo);
597
493}
494
495static int
496pci_iov_init_rman(device_t pf, struct pcicfg_iov *iov)
497{
498 int error;
499
500 iov->rman.rm_start = 0;

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590
591 vfinfo = device_get_ivars(vf);
592
593 vfinfo->cfg.iov = iov;
594 vfinfo->cfg.vf.index = i;
595
596 pci_iov_add_bars(iov, vfinfo);
597
598 error = PCI_ADD_VF(dev, i, driver_config);
598 error = PCI_IOV_ADD_VF(dev, i, driver_config);
599 if (error != 0) {
600 device_printf(dev, "Failed to add VF %d\n", i);
601 pci_delete_child(bus, vf);
602 }
603 }
604
605 bus_generic_attach(bus);
606}

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647 error = pci_iov_config_page_size(dinfo);
648 if (error != 0)
649 goto out;
650
651 error = pci_iov_set_ari(bus);
652 if (error != 0)
653 goto out;
654
599 if (error != 0) {
600 device_printf(dev, "Failed to add VF %d\n", i);
601 pci_delete_child(bus, vf);
602 }
603 }
604
605 bus_generic_attach(bus);
606}

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647 error = pci_iov_config_page_size(dinfo);
648 if (error != 0)
649 goto out;
650
651 error = pci_iov_set_ari(bus);
652 if (error != 0)
653 goto out;
654
655 error = pci_init_iov(dev, num_vfs, config);
655 error = pci_iov_init(dev, num_vfs, config);
656 if (error != 0)
657 goto out;
658 iov_inited = 1;
659
660 IOV_WRITE(dinfo, PCIR_SRIOV_NUM_VFS, num_vfs, 2);
661
662 rid_off = IOV_READ(dinfo, PCIR_SRIOV_VF_OFF, 2);
663 rid_stride = IOV_READ(dinfo, PCIR_SRIOV_VF_STRIDE, 2);

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695
696 nvlist_destroy(config);
697 iov->iov_flags &= ~IOV_BUSY;
698 mtx_unlock(&Giant);
699
700 return (0);
701out:
702 if (iov_inited)
656 if (error != 0)
657 goto out;
658 iov_inited = 1;
659
660 IOV_WRITE(dinfo, PCIR_SRIOV_NUM_VFS, num_vfs, 2);
661
662 rid_off = IOV_READ(dinfo, PCIR_SRIOV_VF_OFF, 2);
663 rid_stride = IOV_READ(dinfo, PCIR_SRIOV_VF_STRIDE, 2);

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695
696 nvlist_destroy(config);
697 iov->iov_flags &= ~IOV_BUSY;
698 mtx_unlock(&Giant);
699
700 return (0);
701out:
702 if (iov_inited)
703 PCI_UNINIT_IOV(dev);
703 PCI_IOV_UNINIT(dev);
704
705 for (i = 0; i <= PCIR_MAX_BAR_0; i++) {
706 if (iov->iov_bar[i].res != NULL) {
707 pci_release_resource(bus, dev, SYS_RES_MEMORY,
708 iov->iov_pos + PCIR_SRIOV_BAR(i),
709 iov->iov_bar[i].res);
710 pci_delete_resource(bus, dev, SYS_RES_MEMORY,
711 iov->iov_pos + PCIR_SRIOV_BAR(i));

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788 }
789
790 for (i = 0; i < devcount; i++) {
791 vf = devlist[i];
792
793 if (pci_iov_is_child_vf(iov, vf))
794 pci_delete_child(bus, vf);
795 }
704
705 for (i = 0; i <= PCIR_MAX_BAR_0; i++) {
706 if (iov->iov_bar[i].res != NULL) {
707 pci_release_resource(bus, dev, SYS_RES_MEMORY,
708 iov->iov_pos + PCIR_SRIOV_BAR(i),
709 iov->iov_bar[i].res);
710 pci_delete_resource(bus, dev, SYS_RES_MEMORY,
711 iov->iov_pos + PCIR_SRIOV_BAR(i));

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788 }
789
790 for (i = 0; i < devcount; i++) {
791 vf = devlist[i];
792
793 if (pci_iov_is_child_vf(iov, vf))
794 pci_delete_child(bus, vf);
795 }
796 PCI_UNINIT_IOV(dev);
796 PCI_IOV_UNINIT(dev);
797
798 iov_ctl = IOV_READ(dinfo, PCIR_SRIOV_CTL, 2);
799 iov_ctl &= ~(PCIM_SRIOV_VF_EN | PCIM_SRIOV_VF_MSE);
800 IOV_WRITE(dinfo, PCIR_SRIOV_CTL, iov_ctl, 2);
801 IOV_WRITE(dinfo, PCIR_SRIOV_NUM_VFS, 0, 2);
802
803 iov->iov_num_vfs = 0;
804

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798 iov_ctl = IOV_READ(dinfo, PCIR_SRIOV_CTL, 2);
799 iov_ctl &= ~(PCIM_SRIOV_VF_EN | PCIM_SRIOV_VF_MSE);
800 IOV_WRITE(dinfo, PCIR_SRIOV_CTL, iov_ctl, 2);
801 IOV_WRITE(dinfo, PCIR_SRIOV_NUM_VFS, 0, 2);
802
803 iov->iov_num_vfs = 0;
804

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